PL460 datasheet(38/48 Pages) MICROCHIP

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PL460

Electrical Characteristics

Data Sheet

DS60001666D - 38

• CPCB is the ground-referenced parasitic capacitance of the printed circuit board (PCB) on the XIN

and XOUT tracks.

Table 11-9 summarizes recommendations to be followed when choosing a crystal.

The PLC protocol firmwares support propagation of the input clock signal through the TXRX1 pin,

allowing fine adjustment of the Cx parameter.

The drive level indicates power consumption by the crystal unit while the oscillation circuit works.

Excessive drive level might cause unexpected change of frequency, crystal damage, or shorter

device lifetime. The drive level is given by the following formula:

DriveLevel=ESR×I2

Where:

• ESR is the equivalent series resistor (specified by the crystal manufacturer).

• I is the current flowing through the crystal in RMS. If the waveform is sine wave or similar, the

effective value is calculated by Ip-p/2√2.

To keep the drive level value inside the manufacturer range, it is required to limit the current

that flows through the crystal. The total power dissipated by the crystal is proportional to RS (see

Figure 11-1), therefore its value can be modified to obtain a drive level that complies with the

requirements. As the value of RS relates to the safety factor, there is a maximum value of RS

that maintains a good safety factor and at the same time keeps the drive level below the crystal

manufacturer maximum specifications.

Table 11-9. Recommended Crystal Characteristics

Parameter

Symbol

Rating

Unit

Min.

Typ.

Max.

Equivalent Series Resistor

ESR

—

100

Motional capacitance

—

3.2

Shunt capacitance

CSHUNT

—

1.3

Frequency tolerance

—

10(1)

ppm

Notes:

1. As required by the G3-PLC specification, the system clock tolerance must not exceed ±25 ppm.

For the PRIME specification, the maximum allowable tolerance is ±50 ppm, while for the Meters

and More specification, it is ±150 ppm. Regardless of the specification, Microchip recommends

selecting a crystal with a frequency tolerance that is lower than the specified maximum. This is

due to actual performance may be affected by production tolerances, temperature stability, and

aging.

11.7. PGA and ADC

Table 11-10. PL460 PGA and ADC Input Characteristics

Parameter

Typical Value

Unit

VIN input impedance

kΩ

VIN max voltage dynamic range

± 0.75

Note: Although the maximum VIN range is 0 - 3.3V, the PGA has been designed to saturate with any

input value greater than the input common mode voltage (VREFC) ± 0.75V. To clamp the input signal,

a pair of series diodes can be used to easily achieve it.

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