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Table 2.17

Clock timing except for sub-clock oscillator (2 of 2)

Parameter

Symbol

Min

Typ

Max

Unit Test conditions

PLL/PLL2 period jitter

fPLL, fPLL2 ≥ 120MHz —

—

±100

—

fPLL, fPLL2 < 120MHz —

—

±120

—

PLL/PLL2 long term jitter

—

±300

—

Term: 1µs, 10µs

Note 1. When setting up the main clock oscillator, ask the oscillator manufacturer for an oscillation evaluation, and use the results as the

recommended oscillation stabilization time. Set the MOSCWTCR register to a value equal to or greater than the recommended

value.

After changing the setting in the MOSCCR.MOSTP bit to start main clock operation, read the OSCSF.MOSCSF flag to confirm that

it is 1, and then start using the main clock oscillator.

Note 2. This is the time from release from reset state until the HOCO oscillation frequency (fHOCO) reaches the range for guaranteed

operation.

Table 2.18

Clock timing for the sub-clock oscillator

Parameter

Symbol

Min Typ

Max Unit Test conditions

Sub-clock frequency

fSUB

—

32.768

—

kHz —

Sub-clock oscillation stabilization wait time

tSUBOSCWT

—

—*1 s

Figure 2.11

Note 1. When setting up the sub-clock oscillator, ask the oscillator manufacturer for an oscillation evaluation and use the results as the

recommended oscillation stabilization time.

After changing the setting in the SOSCCR.SOSTP bit to start sub-clock operation, only start using the sub-clock oscillator after the

sub-clock oscillation stabilization time elapses with an adequate margin. A value that is two times the value shown is recommended.

tXH

tXcyc

EXTAL external clock input

VCC × 0.5

tXL

tXr

tXf

Figure 2.7

EXTAL external clock input timing

Main clock oscillator output

MOSCCR.MOSTP

Main clock

tMAINOSCWT

Figure 2.8

Main clock oscillation start timing

RA4E1 Datasheet

2. Electrical Characteristics

R01DS0391EJ0130 Rev.1.30

Jun 6, 2025

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