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RA4E1 Scheda tecnica(PDF) 38 Page - Renesas Technology Corp |
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RA4E1 Scheda tecnica(HTML) 38 Page - Renesas Technology Corp |
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38 / 81 page ![]() tACYC2 AGTIO, AGTEE (input) tACYC tACKWL tACKWH AGTIO, AGTO, AGTOA, AGTOB (output) Figure 2.23 AGT input/output timing ADTRG0 tTRGW Figure 2.24 ADC12 trigger input timing 2.3.7 CAC Timing Table 2.23 CAC timing Parameter Symbol Min Typ Max Unit Test conditions CAC CACREF input pulse width tPBcyc ≤ tcac*1 tCACREF 4.5 × tcac + 3 × tPBcyc — — ns — tPBcyc > tcac*1 5 × tcac + 6.5 × tPBcyc — — ns Note: tPBcyc: PCLKB cycle. Note 1. tcac: CAC count clock source cycle. RA4E1 Datasheet 2. Electrical Characteristics R01DS0391EJ0130 Rev.1.30 Jun 6, 2025 Page 38 of 81 |
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