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RZ/T2M Scheda tecnica(PDF) 37 Page - Renesas Technology Corp |
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RZ/T2M Scheda tecnica(HTML) 37 Page - Renesas Technology Corp |
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37 / 128 page  1.8 LQFP 176 Pin Assignments 132 131 130 129 128 127 126 125 124 123 122 121 120 119 118 117 116 115 114 113 112 111 110 109 108 107 106 105 104 103 102 101 100 99 98 97 96 95 94 93 92 91 90 89 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 P01_7 P02_0 P02_1 P02_2 P02_3 TRST# VDD P02_4 P02_5 P02_6 P02_7 P03_0 P03_2 P03_3 P03_4 P03_5 P03_6 P04_4 P03_7 P04_0 VDD P04_1 P04_2 P04_3 P05_0 P04_6 P05_2 VDD P05_6 P06_0 P06_2 VCC33 P01_6 BSCANP P05_5 VCC33 P04_7 P04_5 P05_1 P05_3 P05_4 P05_7 VDD P06_6 VDD P18_6 P18_5 P18_4 P18_3 P18_2 P18_1 P18_0 P17_7 P17_6 P17_5 P17_4 P17_2 P17_1 P17_0 VDD P16_7 P15_7 P16_6 P16_5 P16_3 P16_2 P16_1 P16_0 P15_0 P15_2 P14_6 VDD P13_1 P12_7 P12_6 VCC33 P18_7 P17_3 P13_2 VCC33 P15_1 VDD P14_7 P14_5 P13_3 P13_0 P12_5 P12_4 Note: VSS is assigned to Exposed PAD on the QFP package bottom. The PAD must be connected to the ground (0V). Figure 1.4 Pin arrangement (176-pin LQFP) (top view) Table 1.20 List of pins and pin functions (176-pin LQFP) (1 of 6) Pin number Power supply clock system control I/O port Bus Timer (MTU3, POE3, GPT / POEG, CMTW, RTC) Communication (SCI, IIC, GMAC, ETHSW, ESC, USB, CANFD, SPI, xSPI) DSMIF Interrupt ADC12 Encoder I/F 1 VCC33 — — — — — — — — 2 TRACEDATA0 P01_6 A20 MTIOC1A / GTIOC9A CTS1# / CANTXDP1 — — — ENCIF0 3 TRACEDATA1 P01_7 A19 MTIOC1B / GTIOC9B SCK1 / CANRX0 / SPI_RSPCK3 — — ADTRG0# ENCIF1 4 TRACEDATA2 P02_0 A18 GTADSML0 RXD1 / SCL1 / MISO1 / USB_OTGID / CANTX1 / SPI_MISO3 — IRQ4 — ENCIF2 5 MDW P02_1 A17 — — — — — — 6 — P02_2 A16 MTIOC2A / POE10# / GTIOC10A / RTCAT1HZ TXD1 / SDA1 / MOSI1 / CANTX0 / SPI_MOSI3 — IRQ14 — ENCIF3 7 — P02_3 A15 / WE3# / DQMUU / AH# MTIOC2B / POE11# / GTIOC10B SS1# / CTS1# / RTS1# / CANRX1 / SPI_SSL30 — IRQ15 — ENCIF4 8 TRST# — — — — — — — — 9 VDD — — — — — — — — 10 TDO P02_4 WE0# / DQMLL — DE1 / SPI_SSL33 — — — — 11 TDI P02_5 WE1# / DQMLU — SCK5 / SPI_SSL31 — — — ENCIF5 RZ/T2M Datasheet 1. Overview R01DS0383EJ0130 Rev.1.30 Mar 13, 2026 Page 37 of 128 |
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