RZSLASHT2M datasheet(108/128 Pages) RENESAS

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VOH = VCC33 × 0.5, VOL = VCC33 × 0.5, C = 25 pF (RMII)

VOH = VCC33 × 0.5, VOL = VCC33 × 0.5, C = 30 pF (MII)

Table 2.38

Ethernet interface timing (1 of 2)

Parameter

Symbol

Min.

Max.

Unit

Reference

figure

Ethernet

(RGMII)

ETHn_TXCLK, ETHn_RXCLK cycle

time duration

1 Gbps

tRGMIIck

7.2

8.8

Figure 2.81

100 Mbps

10 Mbps

360

440

ETHn_TXCLK, ETHn_RXCLK

frequency

1 Gbps

—

125 − 50 ppm 125 + 50 ppm MHz

100 Mbps

25 − 50 ppm

25 + 50 ppm

10 Mbps

2.5 − 50 ppm

2.5 + 50 ppm

ETHn_TXCLK, ETHn_RXCLK duty

cycle

1 Gbps

—

100 Mbps

10 Mbps

ETHn_TXCLK, ETHn_TXD0 to ETHn_TXD3,

ETHn_TXEN (TX_CTL), ETHn_RXCLK, ETHn_RXD0

to ETHn_RXD3, ETHn_RXDV (RX_CTL) rise/fall time

tRGMIIr,

tRGMIIf*1

—

0.75

ETHn_TXD0 to ETHn_TXD3, ETHn_TXEN (TX_CTL)

to ETHn_TXCLK output skew

tRGMIIos

−0.5

0.5

ETHn_RXD0 to ETHn_RXD3, ETHn_RXDV (RX_CTL)

setup time

tRGMIIs

—

ETHn_RXD0 to ETHn_RXD3, ETHn_RXDV (RX_CTL)

hold time

tRGMIIh

—

Ethernet

(RMII)

ETHn_RXCLK cycle time

tRMIIck

—

Figure 2.82,

Figure 2.83

ETHn_RXCLK frequency Typ. 50 MHz

—

50 − 50 ppm

50 + 50 ppm

MHz

ETHn_RXCLK duty

—

ETHn_RXCLK rise/fall time

tRMIIckr,

tRMIIckf

0.5

3.5

ETHn_TXD0, ETHn_TXD1, ETHn_TXEN output delay

time

tRMIId

2.5

ETHn_RXD0, ETHn_RXD1,

ETHn_RXER, ETHn_RXDV (CRS_DV)

setup time

Case A*2

tRMIIs

4.0

—

Case B*2

4.0

—

Case C*2

4.8

—

ETHn_RXD0, ETHn_RXD1, ETHn_RXER,

ETHn_RXDV (CRS_DV) hold time

tRMIIh

—

ETHn_TXD0, ETHn_TXD1, ETHn_TXEN,

ETHn_RXD0, ETHn_RXD1, ETHn_RXER,

ETHn_RXDV (CRS_DV) rise/fall time

tRMIIr,

tRMIIf

0.5

RZ/T2M Datasheet

2. Electrical Characteristics

R01DS0383EJ0130 Rev.1.30

Mar 13, 2026

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