RZSLASHT2M datasheet(126/128 Pages) RENESAS

126 / 128 page

Revision History

Revision 1.00 — March 22, 2022

● Initial release

Revision 1.10 — September 30, 2022

Features:

● Corrected Trigonometric function unit.

1. Overview:

● Corrected Table 1.3 System.

● Corrected Table 1.8 Communication interfaces.

● Corrected Table 1.9 Analog.

● Corrected Table 1.10 Hardware accelerator for industrial interfaces.

● Corrected Table 1.12 Security.

● Corrected Table 1.14 Others.

● Corrected Table 1.15 Comparison of Functions for Different Packages.

● Corrected Figure 1.1 Block diagram of a 320-pin device.

● Corrected Table 1.18 List of pins and pin functions (320-pin FBGA).

● Corrected Table 1.19 List of pins and pin functions (225-pin FBGA).

● Corrected Table 1.20 List of pins and pin functions (176-pin LQFP).

● Corrected Table 1.21 List of pins and pin functions (128-pin LQFP).

2. Electrical Characteristics:

● Corrected Table 2.21 Bus timing.

● Corrected Table 2.22 Bus timing.

● Corrected Table 2.33 IIC timing.

● Corrected Table 2.46 Temperature sensor characteristics.

Revision 1.20 — October 31, 2023

1. Overview:

● Updated Table 1.7 Timers.

2. Electrical Characteristics:

● Updated Table 2.35 SPI timing.

● Updated Table 2.40 Serial management interface timing.

Revision 1.30 — March 13, 2026

1. Overview:

● Updated Table 1.12 Security

● Updated Table 1.16 Product lineup

● Updated Table 1.19 List of pins and pin functions (225-pin FBGA)

2. Electrical Characteristics:

● Updated Table 2.1 Absolute maximum ratings

● Updated Table 2.2 Power supply

● Updated 2.3 Power On/Off Sequence

● Updated Figure 2.1 Power on/off sequence

● Updated Table 2.3 Power on/off sequence timing

● Updated Table 2.16 Ethernet PHY reference clock output timing

● Updated Table 2.20 Reset, interrupt, and mode timing

● Updated Table 2.23 DMAC timing

● Updated Table 2.24 DMAC timing

● Updated Table 2.32 SCI timing

● Updated Table 2.36 xSPI timing

● Updated Figure 2.77 DS to CS signal timing

● Updated Table 2.37 ΔΣ interface timing

● Updated Table 2.38 Ethernet interface timing

● Updated Figure 2.82 RMII transmission and reception timing (Reference clock input) (n = 0 to 2, m = 0 to 1)

● Added Figure 2.83 RMII transmission and reception timing (Reference clock output) (n = 0 to 2, m = 0 to 1)

● Added Figure 2.85 ESC MII transmission timing (Automatic TX shift disabled,) (n = 0 to 2, m = 0 to 3)

RZ/T2M Datasheet

Revision History

R01DS0383EJ0130 Rev.1.30

Mar 13, 2026

Page 126 of 128

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