M32CSLASH8B datasheet(61/406 Pages) RENESAS

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Under development

M32C/8B Group

8. Bus

Preliminary specification

Specifications in this manual are tentative and subject to change.

REJ09B0450-0050 Rev.0.50 Oct 31, 2008

Page 44 of 385

Bus

In memory expansion mode or microprocessor mode, the following pins become bus control pins: D0 to D15, A0 to

A22, A23, CS0 to CS3, WRL/WR, WRH/BHE, RD, CLKOUT/BCLK/ALE, HLDA/ALE, HOLD, ALE, and RDY.

8.1

Bus Settings

b7 b6 b5 b4

External Data Bus Width Control Register

Symbol

Address

000Bh

Bit Symbol

Bit Name

After Reset

XXXX 1000b (BYTE pin = "L")

XXXX 0000b (BYTE pin = "H")

Function

DS0

DS1

DS2

DS3

−

(b7-b4)

−

External space 0

data bus width select bit

External space 1

data bus width select bit

0: 8 bits wide

1: 16 bits wide

External space 2

data bus width select bit

External space 3

data bus width select bit

0: 8 bits wide

1: 16 bits wide

0: 8 bits wide

1: 16 bits wide

0: 8 bits wide

1: 16 bits wide

Unimplemented.

Write 0. Read as undefined value.

Bus setting is determined by the BYTE pin, the DS register, bits PM05 and PM04 in the PM0 register, and bits

PM11 and PM10 in the PM1 register.

Table 8.1 lists bus settings. Figure 8.1 shows the DS register.

Table 8.1

Bus Settings

Figure 8.1

DS Register

Bus Setting

Pin & Registers Used for Setting

Selecting external data bus width

DS register

Setting bus width after reset

BYTE pin (for external space 3 only)

Selecting separate bus or multiplexed bus

Bits PM05 and PM04 in the PM0 register

Number of chip-select pins

Bits PM11 and PM10 in the PM1 register

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