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HD6432142 Scheda tecnica(PDF) 238 Page - Renesas Technology Corp |
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HD6432142 Scheda tecnica(HTML) 238 Page - Renesas Technology Corp |
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238 / 1177 page ![]() Section 7 Data Transfer Controller (DTC) Rev. 4.00 Sep 27, 2006 page 194 of 1130 REJ09B0327-0400 Table 7.4 Interrupt Sources, DTC Vector Addresses, and Corresponding DTCEs Interrupt Source Origin of Interrupt Source Vector Number Vector Address DTCE* Priority Write to DTVECR Software DTVECR (Decimal indication) H'0400 + DTVECR [6:0] << 1 — High IRQ0 External pin 16 H'0420 DTCEA7 IRQ1 17 H'0422 DTCEA6 IRQ2 18 H'0424 DTCEA5 IRQ3 19 H'0426 DTCEA4 ADI (A/D conversion end) A/D 28 H'0438 DTCEA3 ICIA (FRT input capture A) FRT 48 H'0460 DTCEA2 ICIB (FRT input capture B) 49 H'0462 DTCEA1 OCIA (FRT output compare A) 52 H'0468 DTCEA0 OCIB (FRT output compare B) 54 H'046A DTCEB7 CMIA0 (TMR0 compare-match A) TMR0 64 H'0480 DTCEB2 CMIB0 (TMR0 compare-match B) 65 H'0482 DTCEB1 CMIA1 (TMR1 compare-match A) TMR1 68 H'0488 DTCEB0 CMIB1 (TMR1 compare-match B) 69 H'048A DTCEC7 CMIAY (TMRY compare-match A) TMRY 72 H'0490 DTCEC6 CMIBY (TMRY compare-match B) 73 H'0492 DTCEC5 IBF1 (IDR1 reception completed) HIF 76 H'0498 DTCEC4 IBF2 (IDR2 reception completed) 77 H'049A DTCEC3 RXI0 (reception completed 0) SCI channel 0 81 H'04A2 DTCEC2 TXI0 (transmit data empty 0) 82 H'04A4 DTCEC1 RXI1 (reception completed 1) SCI channel 1 85 H'04AA DTCEC0 TXI1 (transmit data empty 1) 86 H'04AC DTCED7 RXI2 (reception completed 2) SCI channel 2 89 H'04B2 DTCED6 TXI2 (transmit data empty 2) 90 H'04B4 DTCED5 IICI0 (IIC0 1-byte transmission/ reception completed) IIC0 (option) 92 H'04B8 DTCED4 IICI1 (IIC1 1-byte transmission/ reception completed) IIC1 (option) 94 H'04BC DTCED3 Low Note: * DTCE bits with no corresponding interrupt are reserved, and should be written with 0. |
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