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XIO2001 Scheda tecnica(PDF) 13 Page - Texas Instruments

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Il numero della parte XIO2001
Spiegazioni elettronici  Express??to PCI Bus Translation Bridge
PDF  131 Pages
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Produttore elettronici  TI [Texas Instruments]
Homepage  http://www.ti.com
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XIO2001 Scheda tecnica(HTML) 13 Page - Texas Instruments

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2.3
Documents Conventions
2.4
Document History
2.5
Ordering Information
2.6
Terminal Assignments
XIO2001 PCI Express™ to PCI Bus Translation Bridge
www.ti.com
SCPS212B – MAY 2009 – REVISED JULY 2009
Throughout this data manual, several conventions are used to convey information. These conventions are
listed below:
1. To identify a binary number or field, a lower case b follows the numbers. For example: 000b is a 3-bit
binary field.
2. To identify a hexadecimal number or field, a lower case h follows the numbers. For example: 8AFh is a
12-bit hexadecimal field.
3. All other numbers that appear in this document that do not have either a b or h following the number
are assumed to be decimal format.
4. If the signal or terminal name has a bar above the name (for example, GRST), then this indicates the
logical NOT function. When asserted, this signal is a logic low, 0, or 0b.
5. Differential signal names end with P, N, +, or – designators. The P or + designators signify the positive
signal associated with the differential pair. The N or – designators signify the negative signal
associated with the differential pair.
6. RSVD indicates that the referenced item is reserved.
7. In Sections 4 through 6, the configuration space for the bridge is defined. For each register bit, the
software access method is identified in an access column. The legend for this access column includes
the following entries:
r – read access by software
u – updates by the bridge internal hardware
w – write access by software
c – clear an asserted bit with a write-back of 1b by software. Write of zero to the field has no effect
s – the field may be set by a write of one. Write of zero to the field has no effect
na – not accessible or not applicable
REVISION
REVISION
REVISION COMMENTS
DATE
NUMBER
5/2009
Initial release
5/2009
A
Corrected typos in Table 2-1 and Table 2-2
ORDERING
NAME
VOLTAGE
PACKAGE
NUMBER
3.3-V and 5.0-V tolerant PCI bus I/Os
169-terminal ZGU (Lead-Free) Microstar
XIO2001
PCI-Express to PCI Bridge
with 3.3-V and 1.5-V power terminals
PBGA
3.3-V and 5.0-V tolerant PCI bus I/Os
144-terminal ZAJ (Lead-Free) MicroStar
XIO2001
PCI-Express to PCI Bridge
with 3.3-V and 1.5-V power terminals
PBGA
The XIO2001 is available in either a 169-ball ZGU MicroStar BGA or a 144–ball ZAJ MicroStar BGA
package.
Figure 2-1 shows a terminal diagram of the ZGU package, and Table 2-1 lists the ZGU terminals sorted
alphanumerically.
Figure 2-2 shows a terminal diagram of the ZAJ package, and Table 2-2 lists the ZAJ package terminals
sorted alphanumerically.
Table 2-3 shows the terminals by the alphabetically sorted signal names for both packages.
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