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XIO2001 Scheda tecnica(PDF) 21 Page - Texas Instruments |
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XIO2001 Scheda tecnica(HTML) 21 Page - Texas Instruments |
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21 / 131 page ![]() 2.7 Terminal Descriptions XIO2001 PCI Express™ to PCI Bus Translation Bridge www.ti.com SCPS212B – MAY 2009 – REVISED JULY 2009 The following tables give a description of the terminals. These terminals are grouped in tables by functionality. Each table includes the terminal name, terminal number, I/O type, and terminal description. The following list describes the different input/output cell types that appear in the terminal description tables: • HS DIFF IN = High speed differential input • HS DIFF OUT = High speed differential output • PCI BUS = PCI bus 3-state bidirectional buffer with 3.3-V or 5.0-V clamp rail. • LV CMOS = 3.3-V low voltage CMOS input or output with 3.3-V clamp rail • BIAS = Input/output terminals that generate a bias voltage to determine a driver's operating current • Feed through = these terminals connect directly to macros within the part and not through an input or output cell. • PWR = Power terminal • GND = Ground terminal Table 2-4. Power Supply Terminals I/O EXTERNAL SIGNAL ZGU BALL # ZAJ BALL # DESCRIPTION TYPE PARTS PCIR A01, K03 D03, J03 I/O Resistor PCI Rail. 5.0-V or 3.3-V PCI bus clamp voltage to set maximum I/O voltage tolerance of the secondary PCI bus signals. Connect this terminal to the secondary PCI bus I/O clamp rail through a 1k Ω resistor. VDD_15 G04, K07, J08, H08, J07, PWR Bypass 1.5-V digital core power terminals D07, L13, G08, N13, capacitors H10, G10, K13, G11, F11 F10 VDDA_15 F13, H13 E12, H12 PWR Pi filter 1.5-V analog power terminal VDD_33 E04, H03, E05, G06, PWR Bypass 3.3-V digital I/O power terminal J04, L08, H07, G07, capacitors K09, D09, H06, F08, F07, C07, D05, F06, J11 J12 VDD_33_AUX J11 J12 PWR Bypass 3.3-V auxiliary power terminal Note: This terminal is capacitors connected to VSS through a pulldown resistor if no auxiliary supply is present. VDDA_33 D13 C12 PWR Pi filter 3.3-V analog power terminal Table 2-5. Ground Terminals SIGNAL ZGU BALL # ZAJ BALL # I/O TYPE DESCRIPTION VSS D04, F04, H04, E06, F05, G05, H05, GND Digital ground terminals K04, K05, K06, J05, J06, J09, H09, K08, L11, J10, E09, E08, E07, F12 D10, D08, D06, ,F09 F11, F12 VSS E05, E06, E07, GND Ground terminals for thermally-enhanced package E08, E09, F05, F06, F07, F08, F09, G05, G06, G07, G08, G09, H05, H06, H07, H08, H09, J05, J06, J07, J08, J09 VSSA K10, C11, H12, G09, B12, J13, G12, GND Analog ground terminal G11, E11, E10 F13, D12 Submit Documentation Feedback Overview 21 |
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