Motore di ricerca datesheet componenti elettronici
  Italian  ▼
ALLDATASHEETIT.COM

X  

Preview PDF HTML

PCF8533U/2DA/2 Scheda tecnica(PDF) 21 Page - NXP Semiconductors

Il numero della parte PCF8533U/2DA/2
Spiegazioni elettronici  Universal LCD driver for low multiplex rates
PDF  45 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Produttore elettronici  NXP [NXP Semiconductors]
Homepage  http://www.nxp.com
Logo NXP - NXP Semiconductors

PCF8533U/2DA/2 Scheda tecnica(HTML) 21 Page - NXP Semiconductors

Back Button PCF8533U/2DA/2 Datasheet HTML 17Page - NXP Semiconductors PCF8533U/2DA/2 Datasheet HTML 18Page - NXP Semiconductors PCF8533U/2DA/2 Datasheet HTML 19Page - NXP Semiconductors PCF8533U/2DA/2 Datasheet HTML 20Page - NXP Semiconductors PCF8533U/2DA/2 Datasheet HTML 21Page - NXP Semiconductors PCF8533U/2DA/2 Datasheet HTML 22Page - NXP Semiconductors PCF8533U/2DA/2 Datasheet HTML 23Page - NXP Semiconductors PCF8533U/2DA/2 Datasheet HTML 24Page - NXP Semiconductors PCF8533U/2DA/2 Datasheet HTML 25Page - NXP Semiconductors Next Button
Zoom Inzoom in Zoom Outzoom out
 21 / 45 page
background image
PCF8533_4
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 04 — 5 March 2010
21 of 45
NXP Semiconductors
PCF8533
Universal LCD driver for low multiplex rates
After acknowledgement, the control byte is sent defining if the next byte is a RAM or
command information. The control byte also defines if the next byte is a control byte or
further RAM or command data (see Figure 16 and Table 8). In this way it is possible to
configure the device and then fill the display RAM with little overhead.
The command bytes and control bytes are also acknowledged by all addressed
PCF8533s connected to the bus.
The display bytes are stored in the display RAM at the address specified by the data
pointer and the subaddress counter; see Section 7.11 and Section 7.12.
Fig 15. I2C-bus protocol
EXAMPLES
a) transmit two bytes of RAM data
mgl752
S
A
0
S 0 1 110
0
0
control byte
slave address
RAM/command byte
RAM DATA
M
S
B
L
S
B
A
A
P
R/W = 0
S
A
0
S 0 1 110
0
0 1
0
A
A
A
P
RAM DATA
A
b) transmit two command bytes
COMMAND
S
A
0
S 0 1 110
0
1 0
0
A
A
A
P
COMMAND
A
A
c) transmit one command byte and two RAM date bytes
COMMAND
S
A
0
S 0 1 110
0
1 0
00
01
0
A
A
A
P
RAM DATA
A
RAM DATA
A
A
C
O
R
S
Fig 16. Control byte format
Table 8.
Control byte description
Bit
Symbol
Value
Description
7CO
continue bit
0
last control byte
1
control bytes continue
6
RS
register selection
0
command register
1
data register
5 to 0
-
not relevant
mgl753
not relevant
CO
7
6
5
4
3
210
RS
MSB
LSB



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45


Scheda tecnica Scarica

Go To PDF Page


Link URL



Lei ha avuto il aiuto da alldatasheet?  [ DONATE ] 

Di alldatasheet   |   Richest di pubblicita   |   contatti   |   Privacy Policy   |   Collegamento alla scheda tecnica    |   scambio Link   |   Ricerca produttore
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com