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MPC8378E Scheda tecnica(PDF) 115 Page - Freescale Semiconductor, Inc |
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MPC8378E Scheda tecnica(HTML) 115 Page - Freescale Semiconductor, Inc |
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115 / 127 page ![]() MPC8378E PowerQUICC II Pro Processor Hardware Specifications, Rev. 4 Freescale Semiconductor 115 Thermal 23 Thermal This section describes the thermal specifications of the MPC8378E. 23.1 Thermal Characteristics Table 77 provides the package thermal characteristics for the 689 31 × 31mm TePBGA II package. 23.2 Thermal Management Information For the following sections, PD = (VDD × IDD) + PI/O where PI/O is the power dissipation of the I/O drivers. 23.2.1 Estimation of Junction Temperature with Junction-to-Ambient Thermal Resistance An estimation of the chip junction temperature, TJ, can be obtained from the equation: TJ = TA + (RθJA × PD) where: TJ = junction temperature (°C) TA = ambient temperature for the package (°C) RθJA = junction to ambient thermal resistance (°C/W) Table 77. Package Thermal Characteristics for TePBGA II Parameter Symbol Value Unit Notes Junction-to-ambient natural convection on single layer board (1s) RθJA 21 °C/W 1, 2 Junction-to-ambient natural convection on four layer board (2s2p) RθJA 15 °C/W 1, 2, 3 Junction-to-ambient (at 200 ft/min) on single layer board (1s) RθJMA 16 °C/W 1, 3 Junction-to-ambient (at 200 ft/min) on four layer board (2s2p) RθJMA 12 °C/W 1, 3 Junction-to-board thermal RθJB 8 °C/W 4 Junction-to-case thermal RθJC 6 °C/W 5 Junction-to-package natural convection on top ψ JT 6 °C/W 6 Note: 1 Junction temperature is a function of die size, on-chip power dissipation, package thermal resistance, mounting site (board) temperature, ambient temperature, air flow, power dissipation of other components on the board, and board thermal resistance. 2 Per JEDEC JESD51-2 with the single layer board horizontal. Board meets JESD51-9 specification. 3 Per JEDEC JESD51-6 with the board horizontal. 4 Thermal resistance between the die and the printed circuit board per JEDEC JESD51-8. Board temperature is measured on the top surface of the board near the package. 5 Thermal resistance between the die and the case top surface as measured by the cold plate method (MIL SPEC-883 Method 1012.1). 6 Thermal characterization parameter indicating the temperature difference between package top and the junction temperature per JEDEC JESD51-2. When Greek letters are not available, the thermal characterization parameter is written as Psi-JT. |
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