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WM8952ECS/RV Scheda tecnica(PDF) 56 Page - Wolfson Microelectronics plc |
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WM8952ECS/RV Scheda tecnica(HTML) 56 Page - Wolfson Microelectronics plc |
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56 / 72 page  WM8952 Pre Production w PP, Rev 3.1, June 2011 56 REGISTER MAP Dec Hex 000 Software Reset 1000_1001_0100_0000 0 0000_0000_0000_0000 202 Power management 2 000 00000000 BOOSTEN 0 INPPGAEN 0 ADCEN 0000_0000_0000_0000 303 Power management 3 000 00000 0 0000 000 0000_0000_0000_0000 404 Audio Interface 000 0000 BCP FRAMEP 0 ALRSWAP 0 0000_0000_0101_0000 505 Companding control 000 000000 0 WL8 0 0 0 0000_0000_0000_0000 606 Clock Gen control 000 0000 CLKSEL 0MS 0000_0001_0100_0000 707 Additional control 000 0000000 SOFT_START TOGGLE SLOWCLKEN 0000_0000_0000_0000 808 GPIO Stuff 000 00000 MODE_GPIO 0 GPIOPOL 0000_0000_0000_0000 909 Control Interface 000 0000000000 0 AUTOINC 0 0000_0000_0000_0010 10 0A Reserved 11 0B Reserved 000 0000011111 111 0000_0000_1111_1111 12 0C Reserved 13 0D Reserved 14 0E ADC Control 000 0000 HPFEN HPFAPP 0 00 ADCPOL 0000_0001_0000_0000 15 0F ADC Digital Vol 000 00000 0000_0000_1111_1111 16 10 Notch Filter 1 NF0_UP NF0_EN 0000_0000_0000_0000 17 11 Notch Filter 2 NF0_UP 0 0000_0000_0000_0000 18 12 Notch Filter 3 NF1_UP NF1_EN 0000_0000_0000_0000 19 13 Notch Filter 4 NF1_UP 0 0000_0000_0000_0000 20 14 Notch Filter 5 NF2_UP NF2_EN 0000_0000_0000_0000 21 15 Notch Filter 6 NF2_UP 0 0000_0000_0000_0000 22 16 Notch Filter 7 NF3_UP NF3_EN 0000_0000_0000_0000 23 17 Notch Filter 8 NF3_UP NF3_LP 0000_0000_0000_0000 24 18 Reserved 25 19 Reserved 26 1A Reserved 27 1B Reserved 28 1C Reserved 29 1D Reserved 30 1E Reserved 31 1F Reserved 32 20 ALC control 1 0ALCSEL0 0 0000_0000_0011_1000 33 21 ALC control 2 000 00000 0000_0000_0000_1011 34 22 ALC control 3 000 0000 ALCMODE 0000_0000_0011_0010 35 23 Noise Gate 000 000000000 NGEN 0000_0000_0000_0000 36 24 PLL N 000 00000 PLL_POWERDO WN FRACEN 0000_0000_0100_1000 37 25 PLL K 1 000 0000000 0000_0000_0000_1100 38 26 PLL K 2 000 0000 0000_0000_1001_0011 39 27 PLL K 3 000 0000 0000_0000_1110_1001 40 28 Reserved 41 29 Reserved 42 2A Spare Register 000 0000000000 0 ALCZC 0 0000_0000_0011_0000 43 2B Reserved 44 2C Input ctrl 000 0000 MICBVSEL 0000 AUXMODE AUX2INPPGA MICN2INPPGA MICP2INPPGA 0000_0000_0000_0010 45 2D INP PGA gain ctrl 000 00000 INPPGAZC INPPGAMUTE 0000_0000_0101_0000 46 2E Reserved 47 2F ADC BOOST ctrl 000 0000 PGABOOST 00 0000_0000_0000_0000 48 30 Reserved 49 31 Thermal Shutdown 000 0000000000 0 TSDEN 0 0000_0000_0000_0010 50 32 Reserved 51 33 Reserved 52 34 Reserved 53 35 Reserved 54 36 Reserved 55 37 Reserved 56 38 Reserved B1 B0 Default Value (Bin) B5 B4 B3 B2 B9 B8 B7 B6 B13B12 B11B10 ADDR Register Name B15 B14 PLLK[17:9] PLLK[8:0] INPPGAVOL[5:0] MICP2BOOSTVOL[2:0] AUX2BOOSTVOL[2:0] NGTH[2:0] PLL_PRESCALE[1:0] PLLN[3:0] PLLK[23:18] ALCHLD[3:0] ALCLVL[3:0] ALCDCY[3:0] ALCATK[3:0] NF3_A1[13:0] ALCGAIN[5:0] ALCMAX[2:0] ALCMIN[2:0] NF1_A1[13:0] NF2_A0[13:0] NF2_A1[13:0] NF3_A0[13:0] ADCVOL[7:0] NF0_A0[13:0] NF0_A1[13:0] NF1_A0[13:0] SR[2:0] OPCLKDIV[1:0] GPIOSEL[2:0] HPFCUT[2:0] WL[1:0] FMT[1:0] ADC_COMP[1:0] MCLKDIV[2:0] BCLKDIV[2:0] PLLEN MICBEN BIASEN VMIDSEL[1:0] DEVICE_REVISION[2:0] 0 0 LVLSHIFT_EN AUXEN SOTWARE RESET ON WRITE / CHIP ID ON READ 101 Power management 1 0 0 0 0 0 0 Note: Bits marked in green are readable. Other bits are write-only. |
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