EVAL-ADF7020DBZ2 datasheet(45/48 Pages) AD

45 / 48 page

Data Sheet

ADF7020

Rev. D | Page 45 of 48

DIGITAL

TEST MODES

Σ-Δ

TEST MODES

ANALOG TEST

MUX

MANUAL FILTER CAL

PLL TEST MODES

ADDRESS

BITS

PRESCALER

4/5 (DEFAULT)

8/9

CR1

COUNTER RESET

DEFAULT

RESET

CS1

CAL SOURCE

INTERNAL

SERIAL IF BW CAL

DEFAULT = 32. INCREASE

NUMBER TO INCREASE BW

IF USER CAL ON

Figure 57. Register 12—Test Register

This register does not need to be written to in normal

operation. The default test mode is 0x0000 000C, which puts

the part in normal operation.

Using the Test DAC on the ADF7020 to Implement

Analog FM Demodulation and Measuring of SNR

The test DAC allows the output of the postdemodulator filter

for both the linear and correlator/demodulators (see Figure 30

and Figure 31) to be viewed externally. It takes the 16-bit filter

output and converts it to a high frequency, single-bit output

using a second-order Σ-Δ converter. The output can be viewed

on the CLKOUT pin. This signal, when filtered appropriately,

can then be used to

•

Monitor the signals at the FSK/ASK postdemodulator filter

output. This allows the demodulator output SNR to be

measured. Eye diagrams can also be constructed of the

received bit stream to measure the received signal quality.

•

Provide analog FM demodulation.

While the correlators and filters are clocked by DEMOD_CLK,

CDR_CLK clocks the test DAC. Note that although the test

DAC functions in a regular user mode, the best performance is

achieved when the CDR_CLK is increased up to or above the

frequency of DEMOD_CLK. The CDR block does not function

when this condition exists.

Programming the test register, Register 12, enables the test

DAC. In correlator mode, this can be done by writing to Digital

Test Mode 7 or 0x0001C00C.

To view the test DAC output when using the linear demodu-

lator, the user must remove a fixed offset term from the signal

using Register 13. This offset is nominally equal to the IF

frequency. The user can determine the value to program by

using the frequency error readback to determine the actual IF

and then programming half this value into the offset removal

field. It also has a signal gain term to allow the usage of the

maximum dynamic range of the DAC.

Setting Up the Test DAC

•

Digital test modes = 7: enables the test DAC, with no offset

removal (0x0001 C00C).

•

Digital test modes = 10: enables the test DAC, with offset

removal (needed for linear demodulation only, 0x02 800C).

The output of the active demodulator drives the DAC, that is, if

the FSK correlator/demodulator is selected, the correlator filter

output drives the DAC.

The evaluation boards for the ADF7020 contain land patterns

for placement of an RC filter on the CLKOUT line. This is

typically designed so that the cut-off frequency of the filter is

above the demodulated data rate.

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