| Motore di ricerca datesheet componenti elettronici |
|
MX25L6445E Scheda tecnica(PDF) 28 Page - Macronix International |
|
|
|||||||||||||||||||||||||||||
MX25L6445E Scheda tecnica(HTML) 28 Page - Macronix International |
|
28 / 72 page ![]() 28 MX25L6445E P/N: PM1736 REV. 1.8, DEC. 26, 2011 Table 6. ID Definitions Command Type MX25L6445E RDID manufacturer ID memory type memory density C2 20 17 RES electronic ID 16 REMS/REMS2/REMS4/REMS4D manufacturer ID device ID C2 16 (23) Enter Secured OTP (ENSO) The ENSO instruction is for entering the additional 4K-bit Secured OTP mode. While device is in 4K-bit Secured OTP mode, main array access is not available. The additional 4K-bit Secured OTP is independent from main array, and may be used to store unique serial number for system identifier. After entering the Secured OTP mode, follow standard read or program procedure to read out the data or update data. The Secured OTP data cannot be updat- ed again once it is lock-down. The sequence of issuing ENSO instruction is: CS# goes low→ sending ENSO instruction to enter Secured OTP mode→ CS# goes high. Please note that WRSR/WRSCUR/WPSEL/SBLK/GBLK/SBULK/GBULK/CE/BE/SE/BE32K commands are not ac- ceptable during the access of secure OTP region, once Security OTP is lock down, only read related commands are valid. (24) Exit Secured OTP (EXSO) The EXSO instruction is for exiting the additional 4K-bit Secured OTP mode. The sequence of issuing EXSO instruction is: CS# goes low→ sending EXSO instruction to exit Secured OTP mode→ CS# goes high. (25) Read Security Register (RDSCUR) The RDSCUR instruction is for reading the value of Security Register. The Read Security Register can be read at any time (even in program/erase/write status register/write security register condition) and continuously. The sequence of issuing RDSCUR instruction is : CS# goes low→ sending RDSCUR instruction → Security Regis- ter data out on SO→ CS# goes high. The definition of the Security Register is as below: Secured OTP Indicator bit. The Secured OTP indicator bit shows the chip is locked by factory before ex- factory or not. When it is "0", it indicates non-factory lock; "1" indicates factory- lock. Lock-down Secured OTP (LDSO) bit. By writing WRSCUR instruction, the LDSO bit may be set to "1" for cus- tomer lock-down purpose. However, once the bit is set to "1" (lock-down), the LDSO bit and the 4K-bit Secured OTP area cannot be updated any more. |
|
Link URL |
| Lei ha avuto il aiuto da alldatasheet? [ DONATE ] |
Di alldatasheet | Richest di pubblicita | contatti | Privacy Policy | Collegamento alla scheda tecnica | scambio Link | Ricerca produttore All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |