AS5047D datasheet(12/37 Pages) AMSCO

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AS5047D – 12

ams Datasheet: 2014-Jun-27 [v1-02]

De tail ed De sc rip t ion

SPI Transaction

An SPI transaction consists of a 16-bit command frame followed

by a 16-bit data frame. Figure 13 shows the structure of the

command frame.

Figure 13:

SPI Command Frame

To increase the reliability of communication over the SPI, an

even parity bit PARC must be generated and sent. A wrong

setting of the parity bit causes the PARERR bit in the error flag

command frame. The 16-bit command specifies whether the

transaction is a read or a write and the address. Figure 14 shows

the read data frame.

Figure 14:

SPI Read Data Frame

The data is sent on the MISO pin. The parity bit PARD is

calculated by the AS5047D for the 16-bit data frame. If an error

is detected in the previous SPI command frame, the EF bit is set

high. The SPI read is sampled on the rising edge of CSn and the

data is transmitted on MISO with the next read command, as

shown in Figure 15.

Bit

Name

Description

PARC

Parity bit (even) calculated on the command frame

R/W

0: Write

1: Read

13:0

ADDR

Address to read or write

Bit

Name

Description

PARD

Parity bit (even) for the data frame

0: No command frame error occurred

1: Error occurred

13:0

DATA

Data

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