MX25R8035F datasheet(54/89 Pages) MCNIX

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ADVANCED INFORMATION

REV. 0.01, JAN. 06, 2015

MX25R8035F

P/N: PM2164

9-26. Enter Secured OTP (ENSO)

The ENSO instruction is for entering the additional 8K-bit secured OTP mode. While the device is in 8K-bit Secured

OTP mode, array access is not available. The additional 8K-bit secured OTP is independent from main array, and

may be used to store unique serial number for system identifier. After entering the Secured OTP mode, follow

standard read or program procedure to read out the data or update data. The Secured OTP data cannot be updated

again once it is lock-down.

The sequence of issuing ENSO instruction is: CS# goes low→ sending ENSO instruction to enter Secured OTP

mode→ CS# goes high.

The SIO[3:1] are "don't care".

Please note that WRSR/WRSCUR commands are not acceptable during the access of secure OTP region, once

security OTP is lock down, only read related commands are valid.

9-27. Exit Secured OTP (EXSO)

The EXSO instruction is for exiting the additional 8K-bit secured OTP mode.

The sequence of issuing EXSO instruction is: CS# goes low→ sending EXSO instruction to exit Secured OTP

mode→ CS# goes high.

The SIO[3:1] are "don't care".

9-28. Read Security Register (RDSCUR)

The RDSCUR instruction is for reading the value of Security Register bits. The Read Security Register can be read

at any time (even in program/erase/write status register/write security register condition) and continuously.

The sequence of issuing RDSCUR instruction is : CS# goes low→sending RDSCUR instruction→Security Register

data out on SO→ CS# goes high.

The SIO[3:1] are "don't care".

The definition of the Security Register bits is as below:

Secured OTP Indicator bit. The Secured OTP indicator bit shows the chip is locked by factory or not. When it is

"0", it indicates non-factory lock; "1" indicates factory- lock.

Lock-down Secured OTP (LDSO) bit. By writing WRSCUR instruction, the LDSO bit may be set to "1" for

customer lock-down purpose. However, once the bit is set to "1" (lock-down), the LDSO bit and the 1st 4K-bit

Secured OTP area cannot be updated any more.

Program Suspend Status bit. Program Suspend Bit (PSB) indicates the status of Program Suspend operation.

Users may use PSB to identify the state of flash memory. After the flash memory is suspended by Program Suspend

command, PSB is set to "1". PSB is cleared to "0" after program operation resumes.

Erase Suspend Status bit. Erase Suspend Bit (ESB) indicates the status of Erase Suspend operation. Users may

use ESB to identify the state of flash memory. After the flash memory is suspended by Erase Suspend command,

ESB is set to "1". ESB is cleared to "0" after erase operation resumes.

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