MX66L1G45G datasheet(4/124 Pages) MCNIX

4 / 124 page

MX66L1G45G

REV. 1.0, OCT. 01, 2014

P/N: PM2018

1. FEATURES

GENERAL

• Supports Serial Peripheral Interface -- Mode 0 and Mode 3

• Single Power Supply Operation

- 2.7 to 3.6 volt for read, erase, and program operations

• Protocol Support

- Single I/O, Dual I/O and Quad I/O

• Latch-up protected to 100mA from -1V to Vcc +1V

• Low Vcc write inhibit is from 2.3V to 2.5V

• Fast read for SPI mode

- Support clock frequency up to 166MHz

- Support Fast Read, 2READ, DREAD, 4READ, QREAD instructions

- Support DTR (Double Transfer Rate) Mode

- Configurable dummy cycle number for fast read operation

• Quad Peripheral Interface (QPI) available

• Equal Sectors with 4K byte each, or Equal Blocks with 32K byte each or Equal Blocks with 64K byte each

- Any Block can be erased individually

• Programming :

- 256byte page buffer

- Quad Input/Output page program(4PP) to enhance program performance

• Typical 100,000 erase/program cycles

• 20 years data retention

SOFTWARE FEATURES

• Input Data Format

- 1-byte Command code

• Advanced Security Features

- Block lock protection

The BP0-BP3 and T/B status bits define the size of the area to be protected against program and erase

instructions

- Advanced sector protection function (Solid and Password Protect)

• Additional 4K bit security OTP

- Features unique identifier

- factory locked identifiable, and customer lockable

• Command Reset

• Program/Erase Suspend and Resume operation

• Electronic Identification

- JEDEC 1-byte manufacturer ID and 2-byte device ID

- RES command for 1-byte Device ID

- REMS command for 1-byte manufacturer ID and 1-byte device ID

• Support Serial Flash Discoverable Parameters (SFDP) mode

3V 1G-BIT [x 1/x 2/x 4] CMOS MXSMIO

 (SERIAL MULTI I/O)

FLASH MEMORY

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