| Motore di ricerca datesheet componenti elettronici |
|
VPC3232D Scheda tecnica(PDF) 32 Page - Micronas |
|
|
|||||||||||||||||||||||||||||
VPC3232D Scheda tecnica(HTML) 32 Page - Micronas |
|
32 / 78 page ![]() VPC 323xD, VPC 324xD ADVANCE INFORMATION 32 Micronas Table 3–1: Control and status registers I2C Sub- address Number of bits Mode Function Default Name FP Interface h’35 8 r FP status bit [0] write request bit [1] read request bit [2] busy –FPSTA h’36 16 w bit[8:0] 9-bit FP read address bit[11:9] reserved, set to zero –FPRD h’37 16 w bit[8:0] 9-bit FP write address bit[11:9] reserved, set to zero –FPWR h’38 16 w/r bit[11:0] FP data register, reading/writing to this register will autoincrement the FP read/ write address. Only 16 bit of data are transferred per I2C telegram. –FPDAT Black Line Detector h’12 16 w/r read only register, do not write to this register! After reading, LOWLIN and UPLIN are reset to 127 to start a new measure- ment. bit[6:0] number of lower black lines bit[7] always 0 bit[14:8] number of upper black lines bit[15] 0/1 normal/black picture –BLKLIN LOWLIN UPLIN BLKPIC Pin Circuits h’1F 16 w/r SYNC PIN CONTROL: bit[2:0] 0..7 reserved (set to 0) bit[3] 0/1 pushpull/tristate for AVO Pin bit[4] 0/1 pushpull/tristate for other video SYNC Pins bit[5] 0 reserved (set to zero) CLOCK/FIFO PIN CONTROL: bit[6] 0/1 pushpull/tristate for LLC1 bit[7] 0/1 pushpull/tristate for LLC2 bit[8] 0 reserved (set ot 0) bit[9] 0/1 pushpull/tristate for FIFO control pins LUMA/CHROMA DATA PIN (LB[7:0], CB[7:0]) CONTROL: bit[10] 0/1 tristate/pushpull for Chroma Data pins bit[11] 0/1 tristate/pushpull for Luma Data pins bit[15:12] reserved (set to 0) 0 0 0 0 0 0 0 0 0 0 0 0 TRPAD AVODIS SNCDIS LLC1DIS LLC2DIS FFSNCDIS CDIS YDIS h’20 8 w/r SYNC GENERATOR CONTROL: bit[1:0] 00 AVO and active Y/C data at same time 01 AVO precedes Y/C data one clock cycle 10 AVO precedes Y/C data two clock cycles 11 AVO precedes Y/C data three clock cycles bit[2] 0/1 positive/negative polarity for HS signal bit[3] 0/1 positive/negative polarity for HC signal bit[4] 0/1 positive/negative polarity for AVO signal bit[5] 0/1 positive/negative polarity for VS signal bit[6] 0/1 positive/negative polarity for HELP signal bit[7] 0/1 positive/negative polarity for INTLC signal 0 0 0 0 0 0 0 SYNCMODE AVOPRE HSINV HCINV AVOINV VSINV HELPINV INTLCINV |
|
Link URL |
| Lei ha avuto il aiuto da alldatasheet? [ DONATE ] |
Di alldatasheet | Richest di pubblicita | contatti | Privacy Policy | Collegamento alla scheda tecnica | scambio Link | Ricerca produttore All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |