VPC3232D datasheet(39/78 Pages) MICRONAS

39 / 78 page

ADVANCE INFORMATION

VPC 323xD, VPC 324xD

Micronas

h’96

w/r

ADC RANGE :

bit[0]

reserved (set to 0)

bit[1]

0/1

0/+3dB extended ADC range

INPUT PORT SELECT :

bit[2]

0/1

1/2 input port select

SOFTMIXER CONTROL:

bit[5]

0/1

clamp fb to a programable value (0:normal

1: fb=31

−FBOFFS )

bit[6]

0/1

bypass chroma 444

−>422 decimation filter

RGB/YUV SELECT:

bit[7]

0/1

rgb/yuv input select

bit[4:3]

reserved (set to 0)

CIPCNTL

XAR

RGBSEL

FBCLP

CIPCFBY

YUV

h’97

FB MONITOR:

bit[0]

0/1

set by fb high, reset by reg. read and fb low

bit[1]

0/1

set by fb falling edge, reset by reg. read

bit[2]

0/1

set by fb rising edge, reset by reg. read

bit[3]

0/1

fb status at register read

CLIP DETECTOR:

bit[4]

0/1

rgb/yuv input clip detect, reset by read

−

CIPMON

FBHIGH

FBFALL

FBRISE

FBSTAT

CLIPD

Hardware ID

h’9f

Hardware version number

bit[7:0]

0/255

hardware id 1=A, 2=B aso.

bit[11:8] 0/3

product code

0VPC32x0D

1VPC32x1D

2VPC32x2D

3VPC32x3D

bit[15:12] 0/15

product code

VPC323xD 100Hz version

VPC324xD 50Hz version

read

only

I2C Sub-

address

Number

of bits

Mode

Function

Default

Name

VPC3232D Scheda tecnica(PDF) 39 Page - Micronas

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