UCS1003-3 datasheet(74/138 Pages) MICROCHIP

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UCS1003-1/2/3

DS20005346B-page 74

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10.4

Configuration Registers

The Configuration registers control basic device

functionality.

10.4.1

GENERAL CONFIGURATION

The contents of this register are retained in Sleep.

Name

Bits

Address

Cof

Default

General Configuration

15h

R/W

01h

Emulation Configuration

16h

R/W

8Ch

Switch Configuration

17h

R/W

04h

Attach Detect Configuration

18h

R/W

46h

High-Speed Switch Configuration

25h

R/W

14h

GENERAL CONFIGURATION REGISTER (ADDRESS 15h)

R/W-0

U-0

R/W-0

R/W-1

ALERT_MASK

—

ALERT_LINK

DSCHG

RTN_EN

RTN_RST

RATION_BEH<1:0>

bit 7

bit 0

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit

-n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

bit 7

ALERT_MASK:

ALERT# Pin Assertion bit

= The ALERT# pin will not be asserted in the event of an error condition

= The ALERT# pin will be asserted if an error condition or indicator event is detected

bit 6

Unimplemented:

Read as ‘0’

bit 5

ALERT_LINK:

ALERT# Pin LOW_CUR/TREG Link Assertion bit

= The ALERT# pin will be asserted if the LOW_CUR or TREG indicator bit is set

= The ALERT# pin will not be asserted if the LOW_CUR or TREG indicator bit is set

bit 4

DSCHG:

VBUS Discharge bit

Forces the VBUS to be reset and discharged when the UCS1003-1 is in the Active state. Writing this bit to

a logic ‘1’ will cause the port power switch to be opened and the discharge circuitry to activate to discharge

VBUS. The port power switch will remain open while this bit is ‘1’. This bit is not self-clearing.

bit 3

RTN_EN:

Charge Rationing Enable bit

= Charge rationing is enabled (see Section 7.4 “Battery Full (UCS1003-1 Only)”)

= Charge rationing is disabled. The Total Accumulated Charge registers will be cleared to 00_00h

and current data will no longer be accumulated. If the Total Accumulated Charge registers have

already reached the Charge Rationing Threshold (see Section 10.6 “Charge Rationing

Threshold Registers”

), the applied response will be removed as if the charge rationing had

been reset. This will also clear the RATION status bit (if set).

bit 2

RTN_RST:

Charge Rationing Reset bit

When this bit is set to ‘1’, the Total Accumulated Charge registers are reset to 00_00h. In addition,

when this bit is set, the RATION status bit will be cleared, and if there are no other errors or active

indicators, the ALERT# pin will be released.

=EM_EN is logic ‘1’

= EM_EN is logic ‘0’

bit 1-0

RATION_BEH<1:0>:

Power Rationing Threshold Control bit (see Table 7-2)

= Report

= Report and disconnect

= Disconnect and go to Sleep

= Ignore

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