SST25WF010 datasheet(16/36 Pages) MICROCHIP

16 / 36 page

DS20005016C

11/14

512 Kbit / 1 Mbit / 2 Mbit / 4 Mbit 1.8V SPI Serial Flash

SST25WF512 / SST25WF010 / SST25WF020 / SST25WF040

EOL Data Sheet

There is no wrap mode during AAI programming; once the highest unprotected memory address is

reached, the device will exit AAI operation and reset the Write-Enable-Latch bit (WEL = 0) and the AAI

bit (AAI = 0).

End-of-Write Detection

There are three methods to determine completion of a program cycle during AAI Word programming:

hardware detection by reading the Serial Output, software detection by polling the BUSY bit in the Soft-

ware Status Register or wait TBP.

Hardware End-of-Write Detection

The Hardware End-of-Write detection method eliminates the overhead of polling the Busy bit in the

Software Status Register during an AAI Word program operation. The 8-bit command, 70H, configures

the Serial Output (SO) pin to indicate Flash Busy status during AAI Word programming, as shown in

Figure 9. The 8-bit command, 70H, must be executed prior to executing an AAI Word-Program instruc-

tion. Once an internal programming operation begins, asserting CE# will immediately drive the status

of the internal flash status on the SO pin. A ‘0’ indicates the device is busy and a ‘1’ indicates the

device is ready for the next instruction. De-asserting CE# will return the SO pin to tri-state.

The 8-bit command, 80H, disables the Serial Output (SO) pin to output busy status during AAI-Word-

program operation, and re-configures SO as an output pin. In this state, the SO pin will function as a

normal Serial Output pin. At this time, the RDSR command can poll the status of the Software Status

Figure 9: Enable SO as Hardware RY/BY# during AAI Programming

Figure 10:Disable SO as Hardware RY/BY# during AAI Programming

CE#

SCK

01 2 3 4 5 6 7

HIGH IMPEDANCE

MODE 0

MODE 3

1328 F09.0

MSB

CE#

SCK

01 2 3 4 5 6 7

HIGH IMPEDANCE

MODE 0

MODE 3

1328 F10.0

MSB

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