SST25WF010 datasheet(20/36 Pages) MICROCHIP

20 / 36 page

DS20005016C

11/14

512 Kbit / 1 Mbit / 2 Mbit / 4 Mbit 1.8V SPI Serial Flash

SST25WF512 / SST25WF010 / SST25WF020 / SST25WF040

EOL Data Sheet

Read-Status-Register (RDSR)

The Read-Status-Register (RDSR) instruction, 05H, allows reading of the status register. The status

tion is in progress, the Busy bit may be checked before sending any new commands to assure that the

new commands are properly received by the device. CE# must be driven low before the RDSR instruc-

tion is entered and remain low until the status data is read. Read-Status-Register is continuous with

ongoing clock cycles until it is terminated by a low to high transition of the CE#. See Figure 17 for the

RDSR instruction sequence.

Figure 17:Read-Status-Register (RDSR) Sequence

Write-Enable (WREN)

The Write-Enable (WREN) instruction, 06H, sets the Write-Enable-Latch bit in the Status Register to 1

allowing Write operations to occur. The WREN instruction must be executed prior to any Write (Pro-

gram/Erase) operation. The WREN instruction may also be used to allow execution of the Write-Sta-

tus-Register (WRSR) instruction; however, the Write-Enable-Latch bit in the Status Register will be

cleared upon the rising edge CE# of the WRSR instruction. CE# must be driven high before the WREN

instruction is executed. See Figure 18 for the WREN instruction sequence.

Figure 18:Write Enable (WREN) Sequence

1327 F17.0

MODE 3

SCK

CE#

Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0

MODE 0

HIGH IMPEDANCE

Status

MSB

CE#

SCK

01 2 3 4 5 6 7

HIGH IMPEDANCE

MODE 0

MODE 3

1328 F18.0

MSB

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