CS53L30 datasheet(20/67 Pages) CIRRUS

20 / 67 page

DS992F2

CS53L30

4.4 Capture-Path Inputs

4.3.2

Interrupt Handling with the QFN Package

The interrupt pin (INT) is implemented on the QFN package. Interrupt status bits can be individually masked by setting

corresponding bits in the interrupt mask register (see Section 7.35). The configuration of mask bits determines which

events cause the assertion of INT:

• When an unmasked interrupt status event is detected, the status bit is set and INT is asserted.

• When a masked interrupt status event is detected, the interrupt status bit is set, but INT is not affected.

Once INT is asserted, it remains asserted until all status bits that are unmasked and set have been read. If a condition

remains present and the status bit is read, although INT is deasserted, the status bit remains set.

To clear any status bits set due to the initiation of a path or block, all interrupt status bits should be read after reset and

before normal operation begins. Otherwise, unmasking any previously set status bits causes INT to assert.

Figure 4-2. Example of Rising-Edge Sensitive, Sticky, Interrupt Status Bit Behavior (INT Pin in QFN only)

4.4 Capture-Path Inputs

This section describes the line in and mic inputs. Fig. 4-3 shows the capture-path signal flow.

Figure 4-3. Capture-Path Signal Flow

Raw signal feeding

status register bit

Status register bit

___

INT pin

signal

Status read value

Read Source

Channel 2B Data Path

Channel 2A Data Path

Channel 1B Data Path

Channel 1A Data Path

PGA

Decimator

PGA

Decimator

Digital Gain

Adjust

HPF

ADC1A

ADC1B

Digital Gain

Adjust

HPF

Noise Gate

To Serial Port

PGA

Decimator

PGA

Decimator

Digital Gain

Adjust

HPF

ADC2A

ADC2B

Digital Gain

Adjust

HPF

Noise Gate

To Serial Port

IN1+/DMIC1_SD

IN2–

IN1–

IN2+

IN3+/DMIC3_SD

IN4–

IN3–

IN4+

ADC1x_VOL

ADC1x_PGA_VOL

CH_TYPE

ADC1_HPF_EN

ADC1x_VOL

ADC1x_PREAMP

ADC2x_VOL

ADC2x_PGA_VOL

ADC2_HPF_EN

ADC2x_PGA_VOL

ADC2x_VOL

ADC2x_PREAMP

ADC1x_NG

ADC2x_NG

ADC1_HPF_EN

ADC1x_PGA_VOL

ADC2_HPF_EN

CH_TYPE

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