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R5F572TFGDFP Scheda tecnica(PDF) 141 Page - Renesas Technology Corp

Il numero della parte R5F572TFGDFP
Spiegazioni elettronici  Maximum operating frequency: 200 MHz Capable of 1160 CoreMark in operation at 200 MHz
PDF  176 Pages
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Produttore elettronici  RENESAS [Renesas Technology Corp]
Homepage  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

R5F572TFGDFP Scheda tecnica(HTML) 141 Page - Renesas Technology Corp

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R01DS0331EJ0100 Rev.1.00
Page 141 of 176
Feb 08, 2019
RX72T Group
5. Electrical Characteristics
Figure 5.35
Output Disable Time for POEG in Response to Detection of the Output Stopping Signal
from GPTW
Figure 5.36
Output Disable Time for POEG in Response to Edge Detection Signal from a
Comparator
Figure 5.37
Output Disable Time for POEG in Response to the Register Setting
Figure 5.38
Output Disable Time of POEG in Response to the Oscillation Stop Detection
Note 1. GPTWn.GTST.DTEF (dead time error flag), GPTWn.GTST.OABLF (simultaneous low output flag),
or GPTWn.GTST.OABHF (simultaneous high output flag)
Output stopping signal
from GPTW*1
GPTW PWM output pins
Outputs disabled
tPOEGDE
COMPn edge detection
signal (n = 0 to 5)
GPTW PWM output pins
Outputs disabled
tPOEGDC
GPTW PWM output pins
Outputs disabled
tPOEGDS
POEGGn.SSF bit
(n = A to D)
Oscillation stop detection
signal (internal signal)
GPTW PWM output pins
Outputs disabled
tPOEGDOS
Main clock



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