MCP47FXB2XT-EST datasheet(75/124 Pages) MICROCHIP

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DS20006368A-page 75

MCP47FXBX4/8

6.0

I2C SERIAL INTERFACE

MODULE

The MCP47FXBX4/8’s I2C serial interface module

supports the I2C serial protocol specification. This I2C

interface is a two-wire interface (clock and data).

Figure 6-1 shows a typical I2C interface connection.

The I2C specification only defines the field types, field

lengths, timings, etc., of a frame. The frame content

defines the behavior of the device. The frame content

(commands) for the MCP47FXBX4/8 is defined in

Section 7.0 “I2C Device Commands”.

An overview of the I2C protocol is available in

Section Appendix B: “I2C Serial Interface”.

FIGURE 6-1:

Typical I2C Interface.

6.1

Overview

This

section

discusses

some

the

specific

characteristics of the MCP47FXBX4/8’s I2C serial

interface module. This is to assist in the development of

your application.

The following sections discuss some of these device-

specific characteristics:

• Interface Pins (SCL and SDA)

• Communication Data Rates

• POR/BOR

• Device Memory Address

• General Call Commands

• Device I2C Slave Addressing

• Entering High-Speed (HS) Mode

6.2

Interface Pins (SCL and SDA)

The MCP47FXBX4/8 I2C module SCL pin does not

generate the serial clock since the device operates in

Slave mode. Also, the MCP47FXBX4/8 will not stretch

the clock signal (SCL) since memory read access

occurs fast enough.

The MCP47FXBX4/8 I2C module implements slope

control on the SDA pin output driver.

6.3

Communication Data Rates

The I2C interface specifies different communication bit

rates. These are referred to as Standard, Fast or High-

Speed modes. The MCP47FXBX4/8 supports these

three modes. The clock rates (bit rate) of these modes

are:

• Standard mode: up to 100 kHz (kbit/s)

• Fast mode: up to 400 kHz (kbit/s)

• High-Speed mode (HS mode): up to 3.4 MHz

(Mbit/s)

A description on how to enter High-Speed mode is

provided in Section 6.9 “Entering High-Speed (HS)

Mode”.

6.4

POR/BOR

On a POR/BOR event, the I2C Serial Interface Module

state machine is reset and the device’s memory

address pointer is forced to 00h.

6.5

Device Memory Address

The memory address is the 5-bit value that provides

the location in the device’s memory that the specified

command will operate on.

On a POR/BOR event, the device’s memory address

pointer is forced to 00h.

The MCP47FXBX4/8 retains the last “Device Memory

Address” received. That is, the MCP47FXBX4/8 does

not “corrupt” the “Device Memory Address” after

repeated Start or Stop conditions.

6.6

General Call Commands

The

General

Call

commands

utilize

the

I2C

specification reserved General Call command address

and command codes. The MCP47FXBX4/8 also imple-

ments a nonstandard General Call command.

The General Call commands are:

• General Call Reset

• General Call Wake-up (MCP47FXBX4/8 defined)

The General Call Wake-up command will cause all the

MCP47FXBX4/8 devices to exit their Power-Down

state.

6.7

Multi-Master Systems

The MCP47FXBX4/8 is not a master device (one that

generates the interface clock), but can be used in

Multi-Master applications.

SCL

MCP47FXBXX

SDA

Host

Controller

Typical I2C Interface Connections

Other Devices

(Master)

(Slave)

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