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MCP47FXB2XT-EST Scheda tecnica(PDF) 95 Page - Microchip Technology |
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MCP47FXB2XT-EST Scheda tecnica(HTML) 95 Page - Microchip Technology |
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95 / 124 page  2020 Microchip Technology Inc. DS20006368A-page 95 MCP47FXBX4/8 8.3 Layout Considerations Several layout considerations may be applicable to your application. These may include: • Noise • PCB Area Requirements 8.3.1 NOISE Particularly harsh environments may require shielding of critical signals. Inductively-coupled AC transients and digital switching noise can degrade the input and output signal integrity, potentially masking the MCP47FXBX4/8’s performance. Careful board layout minimizes these effects and increases the Signal-to- Noise Ratio (SNR). Multi-layer boards utilizing a low-inductance ground plane, isolated inputs, isolated outputs and proper decoupling are critical to achieving the performance that the silicon is capable to provide. Separate digital and analog ground planes are recommended. In this case, the VSS pin and the ground pins of the VDD capacitors should be terminated to the analog ground plane. 8.3.2 PCB AREA REQUIREMENTS In some applications, PCB area is a criteria for device selection. Table 8-1 shows the typical package dimensions and area for the different package options. Note: Breadboards and wire-wrapped boards are not recommended. TABLE 8-1: PACKAGE FOOTPRINT(1) Package Package Footprint Type Code Dimensions (mm) Area (mm2) Length Width 20 TSSOP ST 3.00 4.90 14.70 20 VQFN MQ 5 5 25 Note 1: Does not include recommended land pattern dimensions. Dimensions are typical values. |
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