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MB90F482 Scheda tecnica(PDF) 69 Page - fujitsu semiconductor |
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MB90F482 Scheda tecnica(HTML) 69 Page - fujitsu semiconductor |
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69 / 113 page ![]() MB90480/485 Series 69 18. External Bus Pin Control Circuit The external bus pin control circuit controls the external bus pins used to expand the CPU address/data bus connections to external circuits. (1) Register List (2) Block Diagram • Auto ready function select register (ARSR) • External address output control register (HACR) • Bus control signal select register (EPCR) Initial value Address : 0000A5H 0011- - 00B Initial value Address : 0000A6H ********B Initial value Address : 0000A7H 1000*10 -B W − * : Write only : Not used : May be either “1” or “0” WW W WW bit 15 bit 14 bit 13 bit 12 bit 11 bit 10 bit 9 bit 8 IOR0 W IOR1 HMR1 HMR0 LMR1 LMR0 W W W W WWW bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 E22 W E23 E21 E20 E19 E18 E17 E16 WW W W W W bit 15 bit 14 bit 13 bit 12 bit 11 bit 10 bit 9 bit 8 RYE W CKE HDE IOBS HMBS WRE LMBS P3 P2 P1 P0 P0 P5 RB P4 P5 Access control Access control Address control Data control P0 direction P0 data |
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