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MB90F482 Scheda tecnica(PDF) 10 Page - fujitsu semiconductor

Il numero della parte MB90F482
Spiegazioni elettronici  16-bit Proprietary Microcontroller CMOS
PDF  113 Pages
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Produttore elettronici  FUJITSU [fujitsu semiconductor]
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MB90480/485 Series
10
(Continued)
Pin No.
Pin name
Circuit
type
Function
LQFP*1 QFP*2
22
24
P45
F
(CMOS)
MB90480
series
This is a general purpose I/O port.
A13
In non-multiplex mode, this pin functions as an external address pin.
P45
G
(CMOS/
H)
MB90485
series
This is a general purpose I/O port.
A13
In non-multiplex mode, this pin functions as an external address pin.
EXTC*3
µPG input pin (MB90485 series only) .
23
24
25
26
P46, P47
F
(CMOS)
This is a general purpose I/O port.
A14, A15
In non-multiplex mode, this pin functions as an external address pin.
OUT4/
OUT5
Output compare event output pins.
68
70
P50
D
(CMOS)
This is a general purpose I/O port. In external bus mode, this pin functions as
the ALE pin.
ALE
In external bus mode, this pin functions as the address load enable (ALE) sig-
nal pin.
69
71
P51
D
(CMOS)
This is a general purpose I/O port. In external bus mode, this pin functions as
the RD pin.
RD
In external bus mode, this pin functions as the read strobe output (RD) signal
pin.
70
72
P52
D
(CMOS)
This is a general purpose I/O port. In external bus mode, when the WRE pin
in the EPCR register is set to “1”, this pin functions as the WRL pin.
WRL
In external bus mode, this pin functions as the lower data write strobe output
(WRL) pin. When the WRE bit in the EPCR register is set to “0”, this pin func-
tions as a general purpose I/O port.
71
73
P53
D
(CMOS)
This is a general purpose I/O port. In external bus mode with 16-bit bus width,
when the WRE bit in the EPCR register is set to “1”, this pin functions as the
WRH pin.
WRH
In external bus mode with 16-bit bus width, this pin
functions as the upper data write strobe output (WRH) pin. When the WRE bit
in the EPCR register is set to “0”, this pin functions as a general purpose I/O
port.
72
74
P54
D
(CMOS)
This is a general purpose I/O port. In external bus mode, when the HDE bit in
the EPCR register is set to “1”, this pin functions as the HRQ pin.
HRQ
In external bus mode, this pin functions as the hold request input (HRQ) pin.
When the HDE bit in the EPCR register is set to “0”, this pin functions as a gen-
eral purpose I/O port.
73
75
P55
D
(CMOS)
This is a general purpose I/O port. In external bus mode, when the HDE bit in
the EPCR register is set to “1”, this pin functions as the HAK pin.
HAK
In external bus mode, this pin functions as the hold
acknowledge (HAK) pin. When the HDE bit in the EPCR register is set to “0”,
this pin functions as a general purpose I/O port.



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