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MB90F482 Scheda tecnica(PDF) 18 Page - fujitsu semiconductor |
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MB90F482 Scheda tecnica(HTML) 18 Page - fujitsu semiconductor |
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18 / 113 page ![]() MB90480/485 Series 18 s s s s MEMORY MAP * : No memory cells from FC0000H to FC7FFFH and FE0000H to FE7FFFH. The upper part of the 00 bank is set up to mirror the image of FF bank ROM, to enable efficient use of small model C compilers. Because the lower 16-bit address of the FF bank and the lower 16-bit address of the 00 bank is the same, enabling reference to tables in ROM without the “far” pointer declaration. For example, in accessing address 00C000H it is actually the contents of ROM at FFC000H that are accessed. If the MS bit in the ROMM register is set to “0”, the ROM area in the FF bank will exceed 48 K bytes and it is not possible to reflect the entire area in the image in the 00 bank. Therefore the image from FF4000H to FFFFFFH is reflected in the 00 bank and the area from FF0000H to FF3FFFH can be seen in the FF bank only. Model Address #1 Address #2 Address #3 MB90F481 FC0000H * 004000H or 008000H, selected by the MS bit in the ROMM register 001100H MB90F482 FC0000H 001900H MB90487 FD0000H 002900H MB90F488 FC0000H 002900H MB90V480 (FC0000H) 004000H MB90V485 (FC0000H) 004000H FFFFFFH 010000H 000100H 0000D0H 000000H RAM RAM RAM Single chip ROM area ROM area FF bank image Address #1 Address #3 Register Peripheral Internal ROM external bus ROM area ROM area FF bank image Register Peripheral External ROM external bus Register Peripheral : internal : External : Access inhibited Address #2 * : In models where address #3 overlaps with address #2, this external area does not exist. * |
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