MB90F482 datasheet(100/113 Pages) FUJITSU

100 / 113 page

MB90480/485 Series

100

(14) Trigger Input Timing

(VCC

= 2.7 V to 3.6 V, VSS = 0.0 V, TA = −40 °C to +85 °C)

* : tCP : See “ (1) Clock Timing Standards”.

(15) Up-down Counter Timing

(VCC

= 2.7 V to 3.6 V, VSS = 0.0 V, TA = −40 °C to +85 °C)

* : tCP : See “ (1) Clock Timing Standards”.

Parameter

Symbol

Pin name

Condi-

tions

Value

Unit

Remarks

Min

Max

Input pulse width

tTRGH

tTRGL

ADTG,

IRQ0 to IRQ7



5 tCP*



Normal operation

µs

Stop mode

Parameter

Symbol

Pin name

Conditions

Value

Unit

Remarks

Min

Max

AIN input “H” pulse width

tAHL

AIN0, AIN1,

BIN0, BIN1

Load

conditions

80 pF

8 tCP*



AIN input “L” pulse width

tALL

8 tCP*



BIN input “H” pulse width

tBHL

8 tCP*



BIN input “L” pulse width

tBLL

8 tCP*



AIN

↑→BIN↑ rise time

tAUBU

4 tCP*



BIN

↑→AIN↓ fall time

tBUAD

4 tCP*



AIN

↓→BIN↑ rise time

tADBD

4 tCP*



BIN

↓→AIN↑ rise tome

tBDAU

4 tCP*



BIN

↑→AIN↑ rise time

tBUAU

4 tCP*



AIN

↑→BIN↓ fall time

tAUBD

4 tCP*



BIN

↓→AIN↑ rise time

tBDAD

4 tCP*



AIN

↓→BIN↑ rise time

tADBU

4 tCP*



ZIN input “H” pulse width

tZHL

ZIN0, ZIN1

4 tCP*



ZIN input “L” pulse width

tZLL

4 tCP*



0.8 VCC

IRQ0 to IRQ7

ADTG

0.8 VCC

0.2 VCC

tTRGH

tTRGL

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