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ADL5308ACCZ-R7 Scheda tecnica(PDF) 4 Page - Analog Devices

Il numero della parte ADL5308ACCZ-R7
Spiegazioni elettronici  Fast Response 188 dB Range (10 pA to 25 mA) Logarithmic Converter
PDF  22 Pages
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Produttore elettronici  AD [Analog Devices]
Homepage  http://www.analog.com
Logo AD - Analog Devices

ADL5308ACCZ-R7 Scheda tecnica(HTML) 4 Page - Analog Devices

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Data Sheet
ADL5308
SPECIFICATIONS
analog.com
Rev. 0 | 4 of 22
Table 1. Electrical Specifications (Continued)
Parameter
Test Conditions/Comments
Min
Typ
Max
Unit
Input Capacitance
1
pF
Glitch Rejection
50
ns
SERIAL-INTERFACE TIMING SPECIFICATIONS
Figure 2. I2C Timing Diagram
Table 2. I2C Timing Specifications
Parameter
Description
Min
Typ
Max
Unit
fSCL(MAX) = 1/t1
Maximum SCL clock frequency
400
kHz
t3
Minimum SCL low period
0.65
1.3
μs
t2
Minimum SCL high period
50
600
ns
t9
Minimum bus free time between STOP/START condition
0.12
1.3
μs
t4
Minimum hold time after (repeated) START condition
140
600
ns
t7
Minimum repeated START condition setup-time
30
600
ns
t8
Minimum STOP condition setup-time
30
600
ns
t6
Minimum data-hold time input
−100
0
ns
t6
Minimum data-hold time output
300
600
900
ns
t5
Minimum data setup-time input
30
100
ns
tSP(MAX)
Maximum suppressed spike pulse width
50
110
250
ns
tRST
Stuck bus reset time (condition: SCL or SDA held low)
25
66
ms
CX
SCL, SDA input capacitance
5
10
pF



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