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ADL5308ACCZ-R7 Scheda tecnica(PDF) 6 Page - Analog Devices

Il numero della parte ADL5308ACCZ-R7
Spiegazioni elettronici  Fast Response 188 dB Range (10 pA to 25 mA) Logarithmic Converter
PDF  22 Pages
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Produttore elettronici  AD [Analog Devices]
Homepage  http://www.analog.com
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ADL5308ACCZ-R7 Scheda tecnica(HTML) 6 Page - Analog Devices

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Data Sheet
ADL5308
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
analog.com
Rev. 0 | 6 of 22
Figure 3. Pin Configuration
Table 5. Pin Function Descriptions
Pin Number
Mnemonic
Description
1, 4
SUM
Guard Pins. The SUM pins are used to shield the input current lines to INP and IREF.
2
INP
Photocurrent Input. INP is connected to the PD anode (current flows into INP).
3
IREF
Reference Current Input. IREF can optionally be connected to a reference current or a second PD for log ratio
measurements (optical gain).
5
SDA
I2C Interface Data Input/Output.
6
SCL
I2C Interface Clock Input.
7
CREF
Comparator Reference Level. Comparator output is high when the VLOG voltage exceeds the voltage applied to this pin.
When left open, the reference level is set by an internal I2C programmable digital-to-analog converter (DAC) if the CREF
register content is not zero.
8
CMP
Comparator Output Voltage.
9
GND
Analog Ground.
10
VLOG
Logarithmic Output. The voltage at this pin changes logarithmically with the current applied to INP and IREF.
11
FB
Feedback Pin of Output Amplifier. Can be used to change the logarithmic slope with two external resistors.
12
HYST
Hysteresis. The voltage at the pin controls the amount of hysteresis in the comparator output. A voltage greater than 2.0 V
applied to this pin enables the latch function.
13
VCC
Positive Power Supply. Decoupling with 1 nF and 4.7 μF capacitors to ground is recommended at this pin.
14
PDB
PD Bias. PDB can be connected to the PD cathode to provide adaptive bias control. A series network of 10 Ω and 220 pF
to ground is recommended at this pin if the PD capacitance is higher than 3 pF. For lowest PD cathode to anode offset at
low input currents, avoid resistive loading at this pin.
15
SUM
One of the exposed pads on the underside of the device, Pin 15, is internally connected to SUM for improved shielding of
the input pins. Connect all SUM pins together and leave floating.
16
GND
One of the exposed pads on the underside of the device, Pin 16, is internally connected to ground and requires good
thermal and electrical connection to the ground of the PCB. Connect all ground pins to a low impedance ground plane.



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