ADL5308ACCZ-R7 datasheet(14/22 Pages) AD

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Data Sheet

ADL5308

THEORY OF OPERATION

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Rev. 0 | 14 of 22

BANDWIDTH

The bandwidth of logarithmic TIAs changes with the input current

IPD, which results in low bandwidth at low input currents, and

gradually increases to high bandwidth at high current levels. In

general, bandwidth and gain have an inverse relationship to each

other, such that increasing the gain of an amplifier typically reduces

its bandwidth and vice versa. Logarithmic TIAs are no exception to

this rule. Using Equation 1, the small-signal gain (transimpedance)

of a TIA, that is, the change in output voltage due to a (small)

change in input current IINP can be expressed as:

Zt=dVLOGdIPD= SLOPE

ln10IINP

(14)

Due to the inherent dynamic range compression by the logarithm,

the TIA gain at low input levels is very high, and thus low bandwidth

is to be expected. Similarly, the transimpedance at high input

currents is much lower, expected to result in higher bandwidth.

Further insight into this relationship between bandwidth and input

current can be obtained from Figure 1, which shows a simplified

schematic of a logarithmic TIA.

The overall topology is usually a negative feedback amplifier using

a diode or the base-emitter junction of a bipolar transistor to estab-

lish the logarithmic transfer from input current to output voltage.

Without feedback, that is, if the gain of the operational amplifier

(Op Amp) is zero, the impedance (to ground) at the input node is

high, most current from the source should flow into the diode, such

that a small parasitic capacitance of the PD and circuit board has

a major impact on the (open-loop) bandwidth of the circuit. The

loop gain in the amplifier reduces the impedance at the input node

by a factor approximately equal to the loop gain, which is roughly

the product of op amp gain, input impedance, and the feedback

diode transconductance. If the loop gain is infinite, the closed-loop

input impedance of the TIA becomes zero, that is, a virtual ground,

and the current through the feedback diode precisely equal to the

source current IS.

In a practical amplifier, where the op amp has high but finite

gain, an increase of the transimpedance gain Zt corresponds to a

decrease of the diode transconductance (which ideally equals the

inverse of Zt) and thus a decrease of the amplifier loop gain. In

turn, a decrease of the loop gain increases the closed-loop input

impedance of the amplifier and given that the input capacitance is

roughly fixed, decreases the amplifier bandwidth. To maintain as

wide as possible bandwidth, it is thus critical to minimize capacitive

loading of the TIA input pins.

NOISE

The noise level produced by a logarithmic TIA is also dependent

on the input current IINP. The output voltage noise is highest at low

input currents (corresponding to the highest small-signal gain), and

lowest at high input current levels. Figure 21 shows the spot noise

spectral density vs. IINP graph. For low input currents, one of the

most dominant noise sources is the 1/f noise of the input NMOS,

shown in Figure 31, which produces a 1/f noise voltage at the input

node.

With a capacitive load at the input, this noise voltage causes an

input 1/f noise current and can produce a hill-shaped spot noise

spectral density curve. Therefore, it is important to minimize the

source capacitance by choosing a PD with as low as possible

equivalent parallel capacitance and as short as possible trace to the

input node. A trade-off between noise density and bandwidth at low

IINP can be made by setting register CF as shown in Figure 18 and

Figure 22 with maximum bandwidth and highest noise density for

CF = 0 (default) and minimum bandwidth and lowest noise density

for CF = 15.

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