HMC1061LC5

Data Sheet

Rev. B | Page 10 of 18

80

20

30

40

50

60

70

0

2

4

6

8

10

12

14

16

18

FREQUENCY (GHz)

2ND FS SFDR

2ND HFS SFDR

3RD FS SFDR

3RD HFS SFDR

Figure 19. Hold Mode SFDR vs. Frequency and Input Power at fCLK = 1 GHz at

6 dBm

80

20

30

40

50

60

70

0

2

4

6

8

10

12

14

16

18

FREQUENCY (GHz)

2ND FS SFDR

2ND HFS SFDR

3RD FS SFDR

3RD HFS SFDR

Figure 20. Hold Mode SFDR vs. Frequency and Input Power at fCLK = 2 GHz at

0 dBm

80

70

60

50

40

30

20

0

2

4

6

8

10

12

14

16

18

FREQUENCY (GHz)

2ND FS SFDR

2ND HFS SFDR

3RD FS SFDR

3RD HFS SFDR

Figure 21. Hold Mode SFDR vs. Frequency and Input Power at fCLK = 3 GHz at

0 dBm

80

70

60

50

40

30

20

0

2

4

6

8

10

12

14

16

18

FREQUENCY (GHz)

THD FS

THD HFS

Figure 22. Hold Mode −THD vs. Frequency and Input Power at fCLK = 1 GHz at

6 dBm

80

70

60

50

40

30

20

0

2

4

6

8

10

12

14

16

18

FREQUENCY (GHz)

THD FS

THD HFS

Figure 23. Hold Mode −THD vs. Frequency and Input Power at fCLK = 2 GHz at

0 dBm

80

70

60

50

40

30

20

0

2

4

6

8

10

12

14

16

18

FREQUENCY (GHz)

THD FS

THD HFS

Figure 24. Hold Mode −THD vs. Frequency and Input Power at fCLK = 3 GHz at

0 dBm