FS6600 datasheet(65/166 Pages) NXP

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NXP Semiconductors

FS6600

Fail-safe system basis chip with multiple SMPS and LDO

Address

Bit

Symbol

Value

Description

VPRE slope compensation

000100

40 mV/µs

000101

50 mV/µs

0 00110

60 mV/μs

0 00111

70 mV/μs

001000

80 mV/µs

001001

90 mV/µs

0 01010

100 mV/μs

0 01110

140 mV/μs

0 10001

170 mV/μs

0 10100

200 mV/μs

OTP_CFG_VPRE_2

5 to 0

VPRESC[5:0]

0 11000

240 mV/μs

VPRE current limitation threshold

50 mV

80 mV

120 mV

7 to 6

VPREILIM[1:0]

150 mV

VPRE low-side slew rate control

PU/PD/130 mA

PU/PD/260 mA

PU/PD/520 mA

3 to 2

VPRESRLS[1:0]

PU/PD/900 mA

VPRE high-side slew rate control

PU/PD/130 mA

PU/PD/260 mA

PU/PD/520 mA

OTP_CFG_VPRE_3

1 to 0

VPRESRHS[1:0]

PU/PD/900 mA

VPRE mode (PWM, APS)

Force PWM for 455 kHz setting

VPRE_MODE

Automatic Pulse Skipping (APS) for 2.2 MHz

setting

VBOOST output voltage

0110

5.0 V

OTP_CFG_BOOST_1

3 to 0

VBSTV[3:0]

1101

5.74 V

BOOST enable

Disabled

BOOSTEN

Enabled

BOOST minimum ON time

60 ns

6 to 5

VBSTTONTIME[1:0]

50 ns

VBOOST slope compensation

0 0110

160 mV/μs

0 1100

125 mV/μs

OTP_CFG_BOOST_2

4 to 0

VBSTSC[4:0]

0 1110

79 mV/μs

Table 75. Main OTP bit description...continued

FS6600

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 3 — 17 July 2024

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