5 Specifications

5.1 Absolute Maximum Ratings

Operation outside the Absolute Maximum Ratings may cause permanent device damage. Absolute Maximum Ratings do not

imply functional operation of the device at these or any other conditions beyond those listed under Recommended Operating

Conditions. If outside the Recommended Operating Conditions but within the Absolute Maximum Ratings, the device may not

be fully functional, and this may affect device reliability, functionality, performance, and shorten the device lifetime.

MIN

MAX

UNIT

SUPPLY VOLTAGE

VDD

Supply voltage for LVCMOS core logic and low speed interface (LSIF)(1)

-0.5

2.3

V

VDDI

Supply voltage for SubLVDS receivers(1)

-0.5

2.3

V

VOFFSET

Supply voltage for HVCMOS and micromirror electrode(1) (2)

-0.5

11

V

VBIAS

Supply voltage for micromirror electrode(1)

-0.5

19

V

VRESET

Supply voltage for micromirror electrode(1)

-15

0.5

V

| VDDI - VDD |

Supply voltage delta, absolute value(3)

0.3

V

| VBIAS - VOFFSET |

Supply voltage delta, absolute value(4)

11

V

| VBIAS - VRESET |

Supply voltage delta, absolute value(5)

34

V

INPUT VOLTAGE

Input voltage for other inputs — LSIF and LVCMOS

-0.5

VDD + 0.5

V

Input voltage for other inputs — SubLVDS(1) (6)

-0.5

VDDI + 0.5

V

SUBLVDS INTERFACE

| VID |

SubLVDS input differential voltage (absolute value)(6)

810

mV

IID

SubLVDS input differential current

10

mA

CLOCK FREQUENCY

ƒclock

Clock frequency for low-speed interface LS_CLK

100

130

MHz

TEMPERATURE DIODE

ITEMP_DIODE

Max current source into the temperature diode

120

µA

ENVIRONMENTAL

TARRAY

Temperature, operating(7)

0

90

°C

TARRAY

Temperature, non-operating(7)

-40

90

°C

TDP

Dew point temperature, operating and non–operating (noncondensing)

81

°C

(1)

All voltage values are with respect to the ground terminals (VSS). The following required power supplies must be connected for proper

DMD operation: VDD, VDDI, VOFFSET, VBIAS, and VRESET. All VSS connections are also required.

(2)

VOFFSET supply transients must fall within specified voltages.

(3)

Exceeding the recommended allowable absolute voltage difference between VDDI and VDD may result in excessive current draw and

permanent damage to the device.

(4)

Exceeding the recommended allowable absolute voltage difference between VBIAS and VOFFSET may result in excessive current draw

and permanent damage to the device.

(5)

Exceeding the recommended allowable absolute voltage difference between VBIAS and VRESET may result in excessive current draw

and permanent damage to the device.

(6)

This maximum input voltage rating applies when each input of a differential pair is at the same voltage potential. SubLVDS differential

inputs must not exceed the specified limit or damage to the internal termination resistors may result.

(7)

The array temperature cannot be measured directly and must be computed analytically from the temperature measured at test point 1

(TP1) shown in Figure 6-2 using the Micromirror Array Temperature Calculation.

DLP391TP

DLPS289A – JUNE 2025 – REVISED SEPTEMBER 2025

www.ti.com

6

Submit Document Feedback

Copyright © 2025 Texas Instruments Incorporated

Product Folder Links: DLP391TP