DLP391TPFSB datasheet(12/46 Pages) TI2

12 / 46 page

5.6 Electrical Characteristics

Over operating free-air temperature range (unless otherwise noted) (1)

PARAMETER (6)

TEST CONDITIONS (2)

MIN

TYP

MAX UNIT

CURRENT

IDD

Supply current: VDD (3) (4)

Typical

140

IDDI

Supply current: VDDI (3) (4)

Typical

IOFFSET

Supply current: VOFFSET (5)

Typical

IBIAS

Supply current: VBIAS (5)

Typical

0.6

IRESET

Supply current: VRESET

Typical

1.8

POWER

PDD

Supply power dissipation: VDD (3) (4)

Typical

252

PDDI

Supply power dissipation: VDDI (3) (4)

Typical

POFFSET

Supply power dissipation: VOFFSET (5)

Typical

PBIAS

Supply power dissipation: VBIAS (5)

Typical

1.08

PRESET

Supply power dissipation: VRESET

Typical

25.2

PTOTAL

Supply power dissipation Total

Typical

419.28

LPSDR INPUT

IIL

Low level input current

VDD = 1.95V, VI = 0V

-100

IIH

High level input current

VDD = 1.95V, VI = 1.95V

135

LPSDR OUTPUT

VOH

DC output high voltage (7) (8) (9)

IOH = -2mA

0.8 x VDD

VOL

DC output low voltage (7) (8) (9)

IOL = 2mA

0.2 x VDD

CAPACITANCE

CIN

Input capacitance LVCMOS

F = 1MHz

CIN

Input capacitance SubLVDS

F = 1MHz

COUT

Output capacitance

F = 1MHz

CTEMP

Temperature sense diode capacitance

F = 1MHz

(1)

Device electrical characteristics are over Section 5.4 unless otherwise noted.

(2)

All voltage values are with respect to the ground pins (VSS).

(3)

To prevent excess current, the supply voltage delta | VDDI – VDD | must be less than the specified limit.

(4)

Supply power dissipation based on non–compressed commands and data.

(5)

To prevent excess current, the supply voltage delta | VBIAS – VOFFSET | must be less than the specified limit.

(6)

All power supply connections are required to operate the DMD: VDD, VDDI, VOFFSET, VBIAS, VRESET. All VSS connections are also

required.

(7)

LPSDR specifications are for pins LS_CLK and LS_WDATA.

(8)

Low-speed interface is LPSDR and adheres to the Electrical Characteristics and AC/DC Operating Conditions table in JEDEC

Standard No. 209-2F, Low-Power Double Data Rate (LPDDR) JESD209-2F.

(9)

LPSDR output specification is for pins LS_RDATA_A, LS_RDATA_B, LS_RDATA_C, LS_RDATA_D.

DLP391TP

DLPS289A – JUNE 2025 – REVISED SEPTEMBER 2025

www.ti.com

Submit Document Feedback

Product Folder Links: DLP391TP

DLP391TPFSB Scheda tecnica(PDF) 12 Page - Texas Instruments

DLP391TPFSB Scheda tecnica(HTML) 12 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46

Scheda tecnica Scarica

Link URL