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LMKDB1104FS Scheda tecnica(PDF) 9 Page - Texas Instruments

Il numero della parte LMKDB1104FS
Spiegazioni elettronici  LMKDB11xx PCIe Gen 1 to Gen 7 Ultra Low Jitter LP-HCSL Clock Buffer Family
PDF  95 Pages
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Produttore elettronici  TI2 [Texas Instruments]
Homepage  https://www.ti.com
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LMKDB1104FS Scheda tecnica(HTML) 9 Page - Texas Instruments

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Table 5-2. LMKDB1108 and LMKDB1108FS Pin Functions (continued)
PIN
TYPE(1)
DESCRIPTION
NAME(2) (3)
NO.
CLK3_P
24
O
LP-HCSL differential clock output 3. No connect if unused.
CLK3_N
25
O
CLK4_P
28
O
LP-HCSL differential clock output 4. No connect if unused.
CLK4_N
29
O
CLK5_P
31
O
LP-HCSL differential clock output 5. No connect if unused.
CLK5_N
32
O
CLK6_P
35
O
LP-HCSL differential clock output 6. No connect if unused.
CLK6_N
36
O
CLK7_P
38
O
LP-HCSL differential clock output 7. No connect if unused.
CLK7_N
39
O
POWER
VDDA
7
P
Analog power supply. Additional power supply filtering is recommended. See Section 10.3
for details.
VDDCLK
10, 13, 20, 26,
37,
P
Output power supply
Thermal Pad (GND)
Pad
G
Device Ground, Thermal pad.
LOGIC CONTROLS / STATUS
vOE0#/SHFT_LD#
14
I
Active low input to control CLK0 or SBI active low shift register load pin. SBI_EN pin
controls function of this pin. Internal pulldown resistor. OE mode: 0 = Active output, 1 =
Inactive output.
Side-Band Mode: SBI latch register input.
vOE1#/SBI_IN
19
I
Active low input to control CLK1 or SBI data input pin. SBI_EN pin controls function of this
pin. Internal pulldown resistor. OE mode: 0 = Active output, 1 = Inactive output.
Side-Band Mode: SBI data input.
vOE2#
21
I
Active low input to control CLK2. Internal pulldown resistor.
0 = Output Active, 1 = Output Inactive
vOE3#
27
I
Active low input to control CLK3. Internal pulldown resistor.
0 = Output Active, 1 = Output Inactive
vOE4#/SBI_CLK
30
I
Active low input to control CLK4 or SBI clock input pin. SBI_EN pin controls function of this
pin. Internal pulldown resistor. OE mode: 0 = Active output, 1 = Inactive output.
Side-Band Mode: SBI clock input.
vOE5#
33
I
Active low input to control CLK5. Internal pulldown resistor.
0 = Output Active, 1 = Output Inactive
vOE10#/SBI_OUT
34
I or O
Active low input to control CLK6 or SBI data output pin. Internal pulldown resistor. SBI_EN
pin controls function of this pin.
OE mode:0 = Active output, 1 = Inactive output.
SBI Mode: SBI shift register data output.
vOE7#
40
I
Active low input to control CLK7. Internal pulldown resistor.
0 = Output Active, 1 = Output Inactive
vPWRGD/PWRDN#
12
I
Power Good/Power Down Active Low. Multifunctional input pin. Internal pulldown resistor.
On the first low-to-high transition, functions as Power Good pin which starts up the device
On the subsequent low/high transitions, functions as Power Down Active Low pin which
controls the device to enter or exit power-down mode.
Low = power-down mode
High = normal operation mode
vSBI_EN
11
I
SBI Enable. Internal pulldown resistor. Do not change the state of this pin after power-up.
Low at power-up = SBI interface disabled. Pin 20, 32, 48 and 55 function as OE pins.
High at power-up = SBI interface enabled. Pin 20, 32, 48 and 55 function as SBI interface
pins. SMBus and other OE pins remain functional.
www.ti.com
LMKDB1102, LMKDB1104, LMKDB1104FS
LMKDB1108, LMKDB1108FS, LMKDB1120, LMKDB1120FS
SNAS855E – NOVEMBER 2023 – REVISED AUGUST 2025
Copyright © 2025 Texas Instruments Incorporated
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Product Folder Links: LMKDB1102 LMKDB1104 LMKDB1104FS LMKDB1108 LMKDB1108FS LMKDB1120 LMKDB1120FS



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