LMKDB1104FS datasheet(10/95 Pages) TI2

10 / 95 page

Table 5-2. LMKDB1108 and LMKDB1108FS Pin Functions (continued)

TYPE(1)

DESCRIPTION

NAME(2) (3)

NO.

^vSADR1_tri

SMBus Address 3-level input pin. Internal pullup and pulldown resistors.

^vSADR0_tri

SMBus Address 3-level input pin. Internal pullup and pulldown resistors.

^SLEWRATE_SEL

LP-HCSL differential clock output slew rate select pin. Internal pullup resistor.

Low = Slow slew rate.

High = Fast slew rate.

LOS#

Loss of Input Clock Signal Active Low/No Connect. Open drain. Requires external pullup

resistor.

Low = Invalid input clock.

High = Valid input clock.

SMB_DATA

I/O

SMBus Data. Requires external pullup resistor. No connect if unused.

SMB_CLK

SMBus Clock. Requires external pullup resistor. No connect if unused.

(1)

I = Input, O = Output, I/O = Input or Output, G = Ground, P = Power, NC = No Connect

(2)

Pins with a "^" prefix have an internal pullup resistor. Pins with a "v" prefix have an internal pulldown resistor. Pins with a "^v" have an

internal pullup resistor and an internal pulldown resistor so that mid level is selected when the pin is left floating.

(3)

The "#" symbol indicates active low.

LMKDB1102, LMKDB1104, LMKDB1104FS

LMKDB1108, LMKDB1108FS, LMKDB1120, LMKDB1120FS

SNAS855E – NOVEMBER 2023 – REVISED AUGUST 2025

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