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MPC5606S Scheda tecnica(PDF) 32 Page - Freescale Semiconductor, Inc |
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MPC5606S Scheda tecnica(HTML) 32 Page - Freescale Semiconductor, Inc |
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32 / 136 page ![]() MPC5606S Microcontroller Data Sheet, Rev. 6 Freescale Semiconductor 32 2.8 Debug pins The debug pins are listed in Table 7. Table 6. System pin descriptions System pin Function I/O direction Pad type RESET config Pin No. 144 LQFP 176 LQFP 208 MAPBG A RESET Bidirectional reset with Schmitt-Trigger characteristics and noise filter. I/O M Input, weak pull up 24 24 J1 EXTAL Analog output of the oscillator amplifier circuit. Input for the clock generator in bypass mode. X - 29 29 M1 XTAL Analog input of the oscillator amplifier circuit. Needs to be grounded if oscillator bypass mode is used. IX - 27 27 K1 VRC_CTRL VREG ballast control gain 25 25 P1 VREG_ BYPASS1 1 VREG_BYPASS should be pulled down externally. Pin used for factory testing I X - 32 32 M4 Table 7. Debug pin descriptions Debug pin Function Pad type I/O direction RESET config Pin number 144 LQFP 176 LQFP 1 208 MAPB GA EVTI Nexus event input M1 I/O Input, Pull Up — 37 T3 EVTO Nexus event output M1 I/O Input, Pull Up — 35 R3 MCKO Nexus message clock output F I/O Input, Pull Up — 33 T1 MDO0 Nexus message clock output M1 I/O Input, Pull Up — 38 T5 MDO1 Nexus message clock output M1 I/O Input, Pull Up — 40 P5 MDO2 Nexus message clock output M1 I/O Input, Pull Up — 42 P4 MDO3 Nexus message clock output M1 I/O Input, Pull Up — 44 L4 MSEO Nexus message clock output M1 I/O Input, Pull Up — 34 T2 |
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