MPC5606S datasheet(9/136 Pages) FREESCALE

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MPC5606S Microcontroller Data Sheet, Rev. 6

Freescale Semiconductor

Table 2 summarizes the operating modes of MPC5606S devices.

Table 2. Operating mode summary1

1 Table Key:

On- Powered and clocked

OP- Optionally configurable to be enabled or disabled (clock gated)

CG- Clock Gated, Powered but clock stopped

Off- Powered off and clock gated

FP- VREG Full Performance mode

LP- VREG Low Power mode, reduced output capability of VREG but lower power consumption

Var- Variable duration, based on the required reconfiguration and execution clock speed

BAM- Boot Assist Module Software and Hardware used for device start-up and configuration

Operating modes:

RUN

HALT

STOP

STANDBY

POR

SoC features

Core

Off

—

Peripherals

Off2

2 The LCD can optionally be kept running while the device is in STANDBY mode

Off

—

Flash memory

Off

—

SRAM

CG3

3 All of the RAM content is retained, but not accessible in STANDBY mode

8KB4

4 8 KB of the RAM content is retained, but not accessible in STANDBY mode

—

Graphics RAM

Off

—

Clock sources

Main PLL

Off

—

Auxiliary PLL

Off

—

16 MHz IRC

OPOPOP

—

X OSC

OPOPOPOPOP

—

128 kHz IRC

OnOnOnOnOn

—

32 KHz XOSC

—

Periodic Wake-up

—

Wake-up input

—

VREG mode

—

Wakeup times5

VREG start-up

—

s

250 µs

50 µs

250 µs6

IRC wake-up

—

4 µs

8 µs

Flash memory

recovery

—

20 µs

100 µs

OSC stabilization

—

1 ms

PLL lock

—

200 µs

S/W reconfig

—

Var

—

Mode switch over

—

TBD

24 µs

28 µs

BAM

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