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MPC5606S Scheda tecnica(PDF) 85 Page - Freescale Semiconductor, Inc |
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MPC5606S Scheda tecnica(HTML) 85 Page - Freescale Semiconductor, Inc |
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85 / 136 page ![]() MPC5606S Microcontroller Data Sheet, Rev. 6 Freescale Semiconductor 85 Table 39. Reset electrical characteristics Symbol C Parameter Conditions1 1 V DD = 3.3 V ± 10% / 5.0 V ± 10%, TA = 40 to 105 °C, unless otherwise specified Value Unit Min Typ Max VIH SR P Input high level CMOS Schmitt Trigger —0.65VDD —VDD + 0.4 V VIL SR P Input low level CMOS Schmitt Trigger — 0.4 — 0.35VDD V VHYS CC D Input hysteresis CMOS Schmitt Trigger —0.1VDD —— V VOL CC P Output low level Push Pull, IOL = 2 mA, VDD = 5.0 V ± 10%, PAD3V5V = 0 (recommended) — — 0.1VDD V D Push Pull, IOL = 1 mA, VDD = 5.0 V ± 10%, PAD3V5V = 1 2 2 This is a transient configuration during power-up, up to the end of reset PHASE2 (refer to reset generation module (RGM) section of the device reference manual). — — 0.1VDD C Push Pull, IOL = 1 mA, VDD = 3.3 V ± 10%, PAD3V5V = 1 (recommended) —— 0.5 Ttr CC T Output transition time output pin3 MEDIUM configuration 3 C L includes device and package capacitance (CPKG <5 pF). CL = 25 pF, VDD = 5.0 V ± 10%, PAD3V5V = 0 —— 10 ns TCL = 50 pF, VDD = 5.0 V ± 10%, PAD3V5V = 0 —— 20 TCL = 100 pF, VDD = 5.0 V ± 10%, PAD3V5V = 0 —— 40 TCL = 25 pF, VDD = 3.3 V ± 10%, PAD3V5V = 1 —— 12 TCL = 50 pF, VDD = 3.3 V ± 10%, PAD3V5V = 1 —— 25 TCL = 100 pF, VDD = 3.3 V ± 10%, PAD3V5V = 1 —— 40 WFRST SR P RESET input filtered pulse — — — 40 ns WNFRST SR P RESET input not filtered pulse — 1000 — — ns IWPU CC P Weak pull-up current absolute value —10 — 150 µA D RUN Current during RESET Before Flash is ready — 10 — mA After Flash is ready — 20 — mA |
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