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MPC5606S Scheda tecnica(PDF) 72 Page - Freescale Semiconductor, Inc |
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MPC5606S Scheda tecnica(HTML) 72 Page - Freescale Semiconductor, Inc |
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72 / 136 page ![]() MPC5606S Microcontroller Data Sheet, Rev. 6 Freescale Semiconductor 72 3.7.4 Recommended power-up and power-down order Figure 8 shows the recommended order for powering up the power supplies on this device. The 1.2 V regulator output starts after the device’s internal POR (VDDREG HV) is deasserted at approximately 2.7 V on VDDREG. Figure 8. Recommended order for powering up the power supplies CAUTION The voltages VA and VB in Figure 8 must always obey the relation VB VA –0.7V. Otherwise, currents from the 1.2 V supply to the 3.3 V supply may result. Figure 9 shows the recommended order for powering down the power supplies on this device. It is acceptable for the VDD IO HV supply to ramp down faster than the 1.2 V regulator output, even if the latter takes time to discharge the high 40 F capacitance. (The capacitor will ultimately discharge.) VDDREG HV supply VDDREG HV POR (internal) 1.2 V regulator output Soft startup (approx. 200 s) VDD IO HV supply (3–5.5 V) 2.7 V >= 200 s VA VB |
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