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UCS1003-2 Scheda tecnica(PDF) 65 Page - Microchip Technology

Il numero della parte UCS1003-2
Spiegazioni elettronici  USB Port Power Controller with Charger Emulation
PDF  138 Pages
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UCS1003-2 Scheda tecnica(HTML) 65 Page - Microchip Technology

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 2014-2015 Microchip Technology Inc.
DS20005346B-page 65
UCS1003-1/2/3
10.3
Status Registers
The Status registers store bits that indicate error
conditions, as well as Attach Detection and Removal
Detection. Unless otherwise noted, these bits will
operate as described when the UCS1003-1 is
operating in Stand-Alone mode.
Name
Bits Address
Cof
Default
Other Status
8
0Fh
R
00h
Interrupt Status
8
10h
R/W
00h
General Status
8
11h
R/R-C
00h
Profile Status 1
8
12h
R
00h
Profile Status 2
8
13h
R
00h
Pin Status
8
14h
R
00h
REGISTER 10-2:
OTHER STATUS REGISTER (ADDRESS 0Fh)
U-0
U-0
R-0
R-0
R-0
R-0
R-0
R-0
—
—
ALERT_PIN ADET_PIN(1) CHG_ACT(2)
EM_ACT(3)
EM_STEP<1:0>
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 7-6
Unimplemented:
Read as ‘0’
bit 5
ALERT_PIN:
ALERT# Pin Status bit
This bit is set and cleared as the ALERT# pin changes states.
1
= ALERT# pin is asserted low
0
= ALERT# pin is released
bit 4
ADET_PIN:
A_DET# Pin Status bit(1)
When set, indicates that the A_DET# pin is asserted low. This bit is set and cleared as the A_DET# pin
changes states.
1
= A_DET# pin is asserted low
0
= A_DET# pin is released
bit 3
CHG_ACT:
IBUS Set/Clear Status bit(2)
This bit is automatically set when IBUS > IBUS_CHG and cleared when IBUS < IBUS_CHG.
1
= IBUS > IBUS_CHG
0
= IBUS < IBUS_CHG
bit 2
EM_ACT:
UCS1003-1 Active State and Emulating Status bit(3)
The actual profile that is being applied is identified by PRE_EM_SEL<3:0> (see Section 10.12.1
“Applied Charger Emulation Register”
). This bit is set and cleared automatically.
1
= Device is in the Active state and emulating
0
= Device is not emulating
bit 1-0
EM_STEP<1:0>:
Charger Emulation Stimulus/Response Pair Application bits
Indicates which stimulus/response pair is currently being applied by the charger emulation profile as
shown below. These bits are set and cleared automatically. Note that the Legacy charger emulation
profiles and the BC1.2 DCP charger emulation profile do not use Stimulus/Response Pair #3.
00
= None applied, waiting for current.
01
= Stimulus/Response #1
10
= Stimulus/Response #2
00
= Stimulus/Response #3 if applicable
Note 1:
If S0 is ‘1’, PWR_EN is enabled and VS is not present; the ADET_PIN bit will cycle if the current draw
exceeds the current capacity of the bypass switch.
2:
The CHG_ACT bit does not indicate that a portable device has accepted one of the charger emulation
profiles. This bit will cycle during the Dedicated Charger Emulation Cycle mode.
3:
The EM_ACT bit does not indicate that a portable device has accepted one of the emulation profiles. This
bit will cycle during the Dedicated Charger Emulation Cycle mode



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