UCS1003-2 datasheet(79/138 Pages) MICROCHIP

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 2014-2015 Microchip Technology Inc.

DS20005346B-page 79

UCS1003-1/2/3

10.4.5

HIGH-SPEED SWITCH

CONFIGURATION REGISTER

The contents of this register are retained in Sleep.

U-0

R/W-1

R/W-0

R/W-1

R/W-0

—

RESERVED

HSW_CUST

HSW_CDP

HSW_DET HSW_DCE

bit 7

bit 0

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit

-n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

bit 7-5

Unimplemented:

Read as ‘0’

bit 4

Reserved:

Do not change

bit 3

HSW_CUST:

Custom Handshake USB High-Speed Data Switch Enable bit

Enables the USB high-speed data switch to be active during the custom handshake. This control is

checked at the beginning of charger emulation. Therefore, changing this control during emulation will

have no immediate effect. Upon restarting charger emulation (as a result of the EM_RETRY bit being set,

a Removal Detection event or change of emulation controls), the high-speed switch will close.

= The USB high-speed data switch is enabled while the custom charger emulation profile is applied;

also, if the custom charger emulation profile is accepted during the Dedicated Charger Emulation

Cycle mode, the high-speed switch will stay closed

= The USB high-speed data switch is disabled while the custom charger emulation profile is applied

bit 2

HSW_CDP:

CDP Handshake USB High-Speed Data Switch Enable bit

Enables the USB high-speed data switch to be active during the CDP handshake. This control is

checked at the beginning of charger emulation. Therefore, changing this control during emulation will

have no immediate effect. Upon restarting charger emulation (as a result of a Removal Detection event

or change of emulation controls), the high-speed switch will close.

= The USB high-speed data switch is enabled during the CDP handshake

= The USB high-speed data switch is disabled during the CDP handshake

bit 1

HSW_DET:

Detect Power State USB High-Speed Data Switch Enable bit

Enables the USB high-speed data switch to be active during the Detect power state. If the S0 control is

set to ‘0’, this bit is ignored.

= The USB high-speed data switch will be closed during the Detect power state

= The USB high-speed data switch is open during the Detect power state

bit 0

HSW_DCE:

DCP Charger Emulation Profile USB High-Speed Data Switch Enable bit

Enables the USB high-speed data switch after the DCP charger emulation profile or one of the Legacy

charger emulation profiles was accepted during the DCE Cycle and the portable device is charging. This

bit is ignored if the UCS1003-1 is not in the Active state. This bit will not cause the high-speed switch to

be closed during emulation when the DCP and Legacy profiles are applied, only after the DCP or a

Legacy charger emulation profile has been accepted.

= The USB high-speed data switch will be closed

= The USB high-speed data switch will be open

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