UCS1003-2 datasheet(67/138 Pages) MICROCHIP

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 2014-2015 Microchip Technology Inc.

DS20005346B-page 67

UCS1003-1/2/3

bit 2

OV_VOLT:

VS_OV Threshold Voltage Status bit

Indicates that the VS voltage has exceeded the VS_OV threshold and the device has entered the Error

state. This bit will be cleared when read if the error condition has been removed or if the ERR bit is

cleared. This bit will cause the ALERT# pin to be asserted and the device to enter the Error state.

= VS > VS_OV

= VS < VS_OV

bit 1

BACK_V:

VBUS Voltage Status bit

Indicates that the VBUS voltage has exceeded the VS or VDD voltages by more than 150 mV. This bit will

be cleared when read if the error condition has been removed or if the ERR bit is cleared. This bit will

cause the ALERT# pin to be asserted and the device to enter the Error state.

= VBUS >VS, or VBUS >VDD by more than 150 mV

= VBUS voltage has not exceeded the VS and VDD voltages by more than 150 mV

bit 0

OV_LIM:

IBUS Current Threshold Status bit

Indicates that the IBUS current has exceeded both the ILIM threshold and the IBUS_R2MIN threshold set-

tings. This bit will be cleared when read if the error condition has been removed or if the ERR bit is

cleared. This bit will cause the ALERT# pin to be asserted and the device to enter the Error state.

= IBUS > ILIM and IBUS_R2MIN

= IBUS has not exceeded both ILIM threshold and the IBUS_R2MIN threshold settings

INTERRUPT STATUS REGISTER (ADDRESS 10h) (CONTINUED)

Note 1:

If the auto-recovery Fault handling is not used, the ERR bit must be written to a logic ‘0’ to be cleared. It

will also be cleared when the PWR_EN control is disabled.

Note that the ERR bit does not necessarily reflect the ALERT# pin status. The ALERT# pin may be

cleared or asserted without the ERR bit changing states.

UCS1003-2 Scheda tecnica(PDF) 67 Page - Microchip Technology