UCS1003-3 datasheet(126/138 Pages) MICROCHIP

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UCS1003-1/2/3

DS20005346B-page 126

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11.2

SMBus Operating Mode

When the COMM_SEL/ILIM pin is connected directly to

ground, or though a pull-down resistor with a value of

33 k

 or below as listed in Table 11-1, the UCS1003-1

communicates via the SMBus or I2C communication

protocols.

11.2.1

SYSTEM MANAGEMENT BUS

In SMBus mode, the UCS1003-1 communicates with a

host controller. The SMBus is a two-wire serial commu-

nication protocol between a computer host and its

peripheral devices. A detailed timing diagram is shown

in Figure 11-1. Stretching of the SMCLK signal is

supported; however, the UCS1003-1 will not stretch the

clock signal.

FIGURE 11-1:

SMBus Timing Diagram.

11.2.1.1

SMBus Start Bit

The SMBus Start bit is defined as a transition of the

SMBus data line from a logic ‘1’ state to a logic ‘0’ state

while the SMBus clock line is in a logic ‘1’ state.

11.2.1.2

SMBus Address and RD/WR Bit

The SMBus address byte consists of the 7-bit client

address followed by the RD/WR indicator bit. If this

RD/WR bit is a logic ‘0’, the SMBus host is writing data

to the client device. If this RD/WR bit is a logic ‘1’, the

SMBus host is reading data from the client device.

The SMBus address is determined based on the resistor

connected on the SEL pin, as shown in Table 11-2.

Note 1:

Upon power-up, the UCS1003-1 will not

respond to any SMBus communications for

5.5 ms. After this time, full functionality is

available.

When in the Sleep state, the first SMBus

read command sent to the UCS1003-1

device address will wake it. Any data sent

to the UCS1003-1 will be ignored and any

data read from the UCS1003-1 should be

considered invalid. The UCS1003-1 will

be fully functional 3 ms after this first read

command is sent. See Section 5.1.2

“Sleep State Operation”

SMDATA

SMCLK

TBUF

S - Start Condition

P - Stop Condition

THIGH

TLOW

THD:STA

TSU:STO

THD:STA

THD:DAT

TSU:DAT

T SU:STA

T FALL

T RISE

Note:

If it is necessary to connect the SEL pin to

VDD via a resistor, the pull-up resistor may

be any value up to 100 k

.

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