T25S16AFEPR datasheet(47/74 Pages) HMSEMI

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24-bit address (A23-A0) into the DI pin. The code and address bits are latched on the rising edge of the CLK

pin. After the address is received, the data byte of the addressed memory location will be shifted out on the

DO pin at the falling edge of CLK with most significant bit (MSB) first. The address is automatically

incremented to the next higher address after each byte of data is shifted out allowing for a continuous stream

of data. This means that the entire memory can be accessed with a single instruction as long as the clock

continues. The instruction is completed by driving CS# high.

The Read Data instruction sequence is shown in Figure 7.13. If a Read Data instruction is issued while

an Erase, Program or Write cycle is in process (BUSY=1) the instruction is ignored and will not have any

effects on the current cycle. The Read Data instruction allows clock rates from D.C. to a maximum of fR (see

AC Electrical Characteristics).

Figure 7.13 Read Data Instruction

7.3.2 Fast Read (0Bh)

The Fast Read instruction is similar to the Read Data instruction except that it can operate at the highest

possible frequency of FR (see AC Electrical Characteristics). This is accomplished by adding eight “dummy”

clocks after the 24-bit address as shown in Figure 7.14. The dummy clocks allow the devices internal circuits

additional time for setting up the initial address. During the dummy clocks the data value on the DI pin is a

“don’t care”.

Figure 7.14a Fast Read Instruction (SPI Mode)

Fast Read (0Bh) in QPI Mode

The Fast Read instruction is also supported in QPI mode. When QPI mode is enabled, the number of

dummy clocks is configured by the “Set Read Parameters (C0h)” instruction to accommodate a wide range of

applications with different needs for either maximum Fast Read frequency or minimum data access latency.

Depending on the Read Parameter Bits P[5:4] setting, the number of dummy clocks can be configured as

either 2, 4, 6 or 8. The default number of dummy clocks upon power up or after a Reset instruction is 2.

HM25Q128A

T25S16AFEPR Scheda tecnica(PDF) 47 Page - Shenzhen Huazhimei Semiconductor Co., Ltd