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T25S16AFEPR Scheda tecnica(PDF) 53 Page - Shenzhen Huazhimei Semiconductor Co., Ltd

Il numero della parte T25S16AFEPR
Spiegazioni elettronici  3V 128M-BIT SERIAL NOR FLASH WITH DUAL AND QUAD SPI&QPI
PDF  74 Pages
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Produttore elettronici  HMSEMI [Shenzhen Huazhimei Semiconductor Co., Ltd]
Homepage  http://www.hmsemi.com/
Logo HMSEMI - Shenzhen Huazhimei Semiconductor Co., Ltd

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53
raised and then lowered) does not require the E3h instruction code, as shown in Figure 7.24. This reduces the
instruction sequence by eight clocks and allows the Read address to be immediately entered after CS# is
asserted low. If the “Continuous Read Mode” bits M5-4 do not equal to (1,0), the next instruction (after CS# is
raised and then lowered) requires the first byte instruction code, thus returning to normal operation. It is
recommended to input FFh on IO0 for the next instruction (8 clocks), to ensure M4= 1 and return the device to
normal operation.
Figure 7.23 Octal Word Read Quad I/O Instruction(Initial command or previous M5-4 ≠10)
Figure 7.24 Octal Word Read Quad I/O Instruction(Initial command or previous M5-4 =10)
7.3.9 Set Burst with Wrap (77h)
The Set Burst with Wrap (77h) command is used in conjunction with “Fast Read Quad I/O” commands to
access a fixed length and alignment of 8/16/32/64-bytes of data. Certain applications can benefit from this
feature and improve the overall system code execution performance. This command loads the W4,W5,W6
bits. Similar to a Quad I/O command, the Set Burst with Wrap command is initiated by driving the CS# pin low
and then shifting the instruction code “77h” followed by 24-dummy bits and 8 “Wrap Bits”, W7-0. The
command sequence is shown in Figure 7.25, Set Burst with Wrap Command Sequence. Wrap bit W7 and the
lower nibble W3-0 are not used.
W6, W5
W4=0
W4=1(DEFAULT)
Wrap Around
Wrap Length
Wrap Around
Wrap Length
0,0
Yes
8-byte
No
N/A
0,1
Yes
16-byte
No
N/A
1,0
Yes
32-byte
No
N/A
1,1
Yes
64-byte
No
N/A
Once W6-4 is set by a Set Burst with Wrap command, all the following “Fast Read Quad I/O” commands
will use the W6-4 setting to access the 8/16/32/64-byte section of data. Note, Status Register-2 QE bit
(SR2[1]) must be set to 1 in order to use the Fast Read Quad I/O and Set Burst with Wrap commands. To exit
the “Wrap Around” function and return to normal read operation, another Set Burst with Wrap command
should be issued to set W4 = 1. The default value of W4 upon power on is 1.
In QPI mode, the “Burst Read with Wrap (0Ch)” instruction should be used to perform the Read operation
HM25Q128A



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